User contributions for Lidnariq
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17 March 2018
- 19:4519:45, 17 March 2018 diff hist −461 m Talk:NESdev IRC channel Reverted edits by 208.71.141.54 (talk) to last revision by NewRisingSun
13 March 2018
- 20:4920:49, 13 March 2018 diff hist +296 NES 2.0 Mapper 519 combine the two latches; they're updated at the same moment
- 19:5919:59, 13 March 2018 diff hist 0 m NES 2.0 Mapper 520 typo
- 19:5719:57, 13 March 2018 diff hist 0 m NES 2.0 Mapper 293 →PRG banking modes: typo
- 04:5404:54, 13 March 2018 diff hist −1 m VRC6 →Mirroring: typo
12 March 2018
- 01:1001:10, 12 March 2018 diff hist 0 m VRC6 →Mode 3: typo
- 01:0901:09, 12 March 2018 diff hist +83 VRC6 →CHR Select 0…7 ($Dxxx, $Exxx): the comment about passing through PPU A10 is only for the pattern tables, so call that difference out
11 March 2018
- 22:5822:58, 11 March 2018 diff hist +254 VRC6 →Other: there's probably a better way to phrase this, but if we're going to talk about this being emergent behavior we probably should mention how ROM nametables would have worked on this variant board
- 02:1302:13, 11 March 2018 diff hist +302 Talk:VRC6 →VRC6 and $B003 bit 5
- 00:2900:29, 11 March 2018 diff hist +837 Talk:VRC6 →VRC6 and $B003 bit 5: new section
10 March 2018
- 23:5523:55, 10 March 2018 diff hist +20 VRC6 →Mirroring: clarify what "not replaced" means
- 23:5223:52, 10 March 2018 diff hist +14 VRC6 →Mirroring: the specific banks used when bit 5 is clear are a function of banks 6 and 7, so you may end up with one-screen or "backwards" vertical instead, also.
- 23:2323:23, 10 March 2018 diff hist −3 m VRC6 →CHR Select 0…7 ($Dxxx, $Exxx): replace one last "$20s bit"
- 23:1223:12, 10 March 2018 diff hist +43 VRC6 →PPU Banking Style ($B003)
9 March 2018
- 22:1322:13, 9 March 2018 diff hist +118 CNROM →Variants: two links to the most recent RE thread
- 22:0722:07, 9 March 2018 diff hist +50 User:Lidnariq/Discrete Logic Table 132 and 173 aren't discrete logic, but they are GNROM-like...
- 02:3302:33, 9 March 2018 diff hist −86 User:Lidnariq/MMC3 Variants →Discrete logic mappers: m36 isn't discrete logic
4 March 2018
- 20:5920:59, 4 March 2018 diff hist 0 TXC 05-00002-010 pinout pin 4 is apparently always grounded
- 00:1500:15, 4 March 2018 diff hist +208 Talk:INES Mapper 195 No edit summary
3 March 2018
- 22:1922:19, 3 March 2018 diff hist +130 Talk:INES Mapper 195 No edit summary
- 22:0822:08, 3 March 2018 diff hist 0 m TXC 05-00002-010 pinout homogenize unknown function arrows
2 March 2018
- 19:3219:32, 2 March 2018 diff hist +38 INES Mapper 036 writes to 4101 ''do'' have an effect
1 March 2018
- 23:1123:11, 1 March 2018 diff hist +21 m TXC 05-00002-010 pinout add cat
- 21:5621:56, 1 March 2018 diff hist +535 TXC 05-00002-010 pinout add krzysiobal's REd schematic pinout
- 21:3221:32, 1 March 2018 diff hist −934 INES Mapper 036 move pinout to its own page so that we can refer to it from multiple mappers
- 21:3221:32, 1 March 2018 diff hist +1,201 N TXC 05-00002-010 pinout get made
28 February 2018
- 20:4720:47, 28 February 2018 diff hist −10 INES Mapper 227 very light editing (grammar) and cease claiming that the notes are unchanged
27 February 2018
- 03:4203:42, 27 February 2018 diff hist +61 User:Lidnariq/MMC3 Variants →ASIC mappers with simple banking: update per wiki additions
26 February 2018
- 23:5423:54, 26 February 2018 diff hist +105 INES Mapper 194 more comprehensive xref
- 23:5323:53, 26 February 2018 diff hist +234 INES Mapper 191 xref to other CHR RAM+CHR ROM boards current
- 23:5323:53, 26 February 2018 diff hist +54 m INES Mapper 074 xref to m119
- 07:1407:14, 26 February 2018 diff hist −731 m Talk:NESdev IRC channel Reverted edits by 208.71.141.54 (talk) to last revision by NewRisingSun
25 February 2018
- 20:1520:15, 25 February 2018 diff hist +129 INES Mapper 195 xref to Waixing's VRC4 CHRRAM+ROM boards
- 20:1520:15, 25 February 2018 diff hist +129 INES Mapper 194 xref to Waixing's VRC4 CHRRAM+ROM boards
- 20:1520:15, 25 February 2018 diff hist +129 INES Mapper 192 xref to Waixing's VRC4 CHRRAM+ROM boards
- 20:1520:15, 25 February 2018 diff hist +129 INES Mapper 074 xref to Waixing's VRC4 CHRRAM+ROM boards
- 20:1520:15, 25 February 2018 diff hist +180 INES Mapper 253 xref to Waixing's MMC3 CHRRAM+ROM boards
- 20:1520:15, 25 February 2018 diff hist +180 INES Mapper 252 xref to Waixing's MMC3 CHRRAM+ROM boards
- 19:4619:46, 25 February 2018 diff hist 0 m Mapper →iNES 1.0 mapper grid: update m253 icon
24 February 2018
- 07:4907:49, 24 February 2018 diff hist +13 INES Mapper 036 xref to m173 also
- 06:0006:00, 24 February 2018 diff hist +80 INES Mapper 036 xref back to m132
18 February 2018
- 19:0119:01, 18 February 2018 diff hist +363 INES Mapper 225 xref against m255; mention cart RAM's variable presence
- 18:3518:35, 18 February 2018 diff hist −8 m INES Mapper 176 tidy up defaultsort + cats
- 07:1307:13, 18 February 2018 diff hist +105 TxROM →Board Types: TR1ROM and TVROM are singletons so call them out
- 07:1007:10, 18 February 2018 diff hist +199 N Talk:INES Mapper 224 →incorrect headers q: new section
12 February 2018
- 02:3502:35, 12 February 2018 diff hist −2 NES Game Genie IC pinout that ''can't'' be CHR /A13, because it needs to disable cart CHR ROM, not the nametable RAM. So retraced pin 48 also current
- 02:0702:07, 12 February 2018 diff hist −34 m Game Genie use interwiki links
10 February 2018
- 07:0507:05, 10 February 2018 diff hist +208 N Talk:NES 2.0 Mapper 284 →Allocation: new section
4 February 2018
- 22:0822:08, 4 February 2018 diff hist +359 NES 2.0 submappers/Proposals →019: Namco 129 and 163
- 21:1721:17, 4 February 2018 diff hist +159 NES 2.0 submappers →002, 003, 007: UxROM, CNROM, AxROM: elucidate what the "default iNES behavior" appears to be
