User:Lidnariq/Discrete Logic Table

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Revision as of 23:44, 26 October 2012 by Lidnariq (talk | contribs) (footnote for m168 omitted an important detail)
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It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style.

GxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6 7 8
32kB PRG bank bits 0 NROM Vs. System CNROM, 87, 101 oversize CNROM
1 AN1ROM¹ MHROM NINA-03/06
2 ANROM¹, BNROM GNROM, 38 86 11, 36, 140 oversize 38
3 AOROM¹ 113
4 oversize AxROM¹ oversize GNROM
5
6
7
8 oversize BNROM


UxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6
16kB PRG bank bits 2 168
3 UNROM, 94 72, 78¹, 89¹, 93, 152¹
4 UOROM, 180 70, 92
5
6 oversize 94
7
8 oversize UxROM


† 4F+4 CHR-RAM banking, not 8 CHR-ROM banking

¹ has mapper-controlled single-screen mirroring.