INES Mapper 029: Difference between revisions

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(How WRAM and lack of bus conflicts are connected)
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The board includes 4x banks worth of full 8KB CHR ram, and 8x 16KB PRG banks.  
The board includes 4x banks worth of full 8KB CHR ram, and 8x 16KB PRG banks.  


It is hard-wired for vertical mirroring, and contains 8KB of WRAM mounted in the usual place. There is no battery, but pads are present and suitable for such a purpose if anyone were so inclined. There are no bus conflicts.
It is hard-wired for vertical mirroring, and contains 8KB of WRAM mounted in the usual place. There is no battery, but pads are present and suitable for such a purpose if anyone were so inclined. There are no bus conflicts; presumably the other half of the 7420 in the [[PRG RAM circuit]] disables the chip's output on writes.


The board contains logic designed for reprogramming from a CopyNES. If EXP0 and R/W go low, /WR reaches the flash ROM. When EXP0 is high, the internal bankswitching register gets accessed.
The board contains logic designed for reprogramming from a CopyNES. If EXP0 and R/W go low, /WR reaches the flash ROM. When EXP0 is high, the internal bankswitching register gets accessed.

Revision as of 22:08, 16 November 2013

This mapper was allocated on 15-nov-2013 by a mysterious jerkface to implement some homebrew games, including Glider. FCEUX acquired support on r3029.

The example board in question was marked as follows: "Sealie Computing", "RET-CUFROM revD", "2/29/08"

The board includes 4x banks worth of full 8KB CHR ram, and 8x 16KB PRG banks.

It is hard-wired for vertical mirroring, and contains 8KB of WRAM mounted in the usual place. There is no battery, but pads are present and suitable for such a purpose if anyone were so inclined. There are no bus conflicts; presumably the other half of the 7420 in the PRG RAM circuit disables the chip's output on writes.

The board contains logic designed for reprogramming from a CopyNES. If EXP0 and R/W go low, /WR reaches the flash ROM. When EXP0 is high, the internal bankswitching register gets accessed.

 Registers:
 ---------------------------
 
 Range,Mask:   $8000-FFFF, $8000
 
   $8000:  [...P PPCC]
     C = CHR RAM bank
     P = PRG ROM bank
 
 PRG Setup:
 ---------------------------
      $8000   $A000   $C000   $E000  
     +-------------------------------+
     |     $8000     |     { -1}     |
     +---------------+---------------+
 
 CHR Setup:
 ---------------------------
       $0000   $1000   
     +-------+-------+
     |     $8000     |
     +-------+-------+