88 pinout: Difference between revisions

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(thanks Fisher)
 
(krzsyiobal's correction)
Line 9: Line 9:
   (r) CHR A15 <- |05  36| -> CHR A16 (r)
   (r) CHR A15 <- |05  36| -> CHR A16 (r)
   (r) CHR A17 <- |06  35| -> CHR A11 (r)
   (r) CHR A17 <- |06  35| -> CHR A11 (r)
       (f) /IRQ <- |07  34| -> PRG RAM /WE (w)
       (f) /IRQ <- |07  34| -> PRG RAM +WE (w)
   (f) /ROMSEL -> |08  33| -> PRG RAM +CE (w)
   (f) /ROMSEL -> |08  33| -> PRG RAM /WE (w)
           GND -- |09  32| -- GND
           GND -- |09  32| -- GND
       (f) R/W -> |10  31| <- CPU D3 (fr)
       (f) R/W -> |10  31| <- CPU D3 (fr)

Revision as of 19:28, 29 December 2017

88 is the marking on an MMC3 clone used in pirate games.

                  .--\/--.             
   (r) CHR A13 <- |01  40| <- PPU A10 (f)
   (r) CHR A14 <- |02  39| <- PPU A11 (f)
   (r) CHR A12 <- |03  38| <- PPU A12 (f)
 (f) CIRAM A10 <- |04  37| -> CHR A10 (r)
   (r) CHR A15 <- |05  36| -> CHR A16 (r)
   (r) CHR A17 <- |06  35| -> CHR A11 (r)
      (f) /IRQ <- |07  34| -> PRG RAM +WE (w)
   (f) /ROMSEL -> |08  33| -> PRG RAM /WE (w)
           GND -- |09  32| -- GND
       (f) R/W -> |10  31| <- CPU D3 (fr)
   (r) PRG A15 <- |11  30| <- CPU D2 (fr)
   (r) PRG A13 <- |12  29| <- CPU D4 (fr)
   (f) CPU A14 -> |13  28| <- CPU D1 (fr)
   (r) PRG A16 <- |14  27| <- CPU D5 (fr)
   (r) PRG A18 <- |15  26| <- CPU D0 (fr)
   (f) CPU A13 -> |16  25| <- CPU D6 (fr)
   (r) PRG A17 <- |17  24| <- CPU A0 (fr)
   (r) PRG A14 <- |18  23| <- CPU D7 (fr)
   (r) PRG /CE <- |19  22| -> PRG RAM /CE (w)
           VCC -- |20  21| <- M2 (f)
                  '------'

Key:

(r)
To ROM (and WRAM if applicable)
(w)
To WRAM only
(f)
To Control Deck only
(fr)
Shared bus with ROM, WRAM, and Control Deck

See also

References