74161: Difference between revisions
From NESdev Wiki
Jump to navigationJump to search
(cat) |
m (remove pre) |
||
| Line 2: | Line 2: | ||
Several discrete logic [[mapper]]s use it as a latch. | Several discrete logic [[mapper]]s use it as a latch. | ||
== 74161 Pinout == | == 74161 Pinout == | ||
.--\/--. | |||
/Clear -o|01 16|-- +5V | |||
Clock --|02 15|-- CarryOut | |||
D0 --|03 14|-- Q0 | |||
D1 --|04 13|-- Q1 | |||
D2 --|05 12|-- Q2 | |||
D3 --|06 11|-- Q3 | |||
CountEnable --|07 10|-- CarryIn | |||
CountEnable --|07 10|-- CarryIn | Gnd --|08 09|o- /Load | ||
`------' | |||
== Signal descriptions == | == Signal descriptions == | ||
While /Clear is low, Q is reset to 0. | While /Clear is low, Q is reset to 0. | ||
Revision as of 04:25, 31 January 2013
The 74161 (common variants 74LS161, 74HC161) is a 74-series logic 4-bit latch and upwards counter. Several discrete logic mappers use it as a latch.
74161 Pinout
.--\/--.
/Clear -o|01 16|-- +5V
Clock --|02 15|-- CarryOut
D0 --|03 14|-- Q0
D1 --|04 13|-- Q1
D2 --|05 12|-- Q2
D3 --|06 11|-- Q3
CountEnable --|07 10|-- CarryIn
Gnd --|08 09|o- /Load
`------'
Signal descriptions
While /Clear is low, Q is reset to 0.
When CountEnable and CarryIn are both high, a low-to-high transition on Clock increases the value of Q by 1, wrapping from 15 to 0.
CarryOut is high when CarryIn is high and Q is 15.
/Load causes Q to be set to the value of D on a low-to-high transition of Clock.
