User:Lidnariq/Discrete Logic Table: Difference between revisions
From NESdev Wiki
Jump to navigationJump to search
m (looks slightly better) |
m (minor reformat, add m168) |
||
| Line 1: | Line 1: | ||
It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style | It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style. | ||
How on earth do I make these HTML tables look good in wiki markup? | How on earth do I make these HTML tables look good in wiki markup? | ||
| Line 20: | Line 20: | ||
<tr><td colspan=2 rowspan=2>UxROM-like</td><td colspan="7" align="center" rowspan="1">8kB CHR bank bits</td></tr> | <tr><td colspan=2 rowspan=2>UxROM-like</td><td colspan="7" align="center" rowspan="1">8kB CHR bank bits</td></tr> | ||
<tr><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td></tr> | <tr><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td></tr> | ||
<tr><td colspan="1" rowspan="7">16kB PRG bank bits</td><td>2</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr> | <tr><td colspan="1" rowspan="7">16kB PRG bank bits</td><td>2</td><td></td><td></td><td></td><td></td><td>[[iNES Mapper 168|168]]†</td><td></td><td></td></tr> | ||
<tr><td>3</td><td>[[UxROM|UNROM]], [[iNES Mapper 094|94]]</td><td></td><td></td><td></td><td>[[iNES Mapper 072|72]], [[iNES Mapper 078|78]]¹, [[iNES Mapper 089|89]]¹, [[iNES Mapper 093|93]], [[iNES Mapper 152|152]]¹</td><td></td></tr> | <tr><td>3</td><td>[[UxROM|UNROM]], [[iNES Mapper 094|94]]</td><td></td><td></td><td></td><td>[[iNES Mapper 072|72]], [[iNES Mapper 078|78]]¹, [[iNES Mapper 089|89]]¹, [[iNES Mapper 093|93]], [[iNES Mapper 152|152]]¹</td><td></td></tr> | ||
<tr><td>4</td><td>[[UxROM|UOROM]], [[iNES Mapper 180|180]]</td><td></td><td></td><td></td><td>[[iNES Mapper 070|70]], [[iNES Mapper 092|92]]</td></tr> | <tr><td>4</td><td>[[UxROM|UOROM]], [[iNES Mapper 180|180]]</td><td></td><td></td><td></td><td>[[iNES Mapper 070|70]], [[iNES Mapper 092|92]]</td></tr> | ||
| Line 28: | Line 28: | ||
<tr><td>8</td><td>oversize [[UxROM]]</td></tr> | <tr><td>8</td><td>oversize [[UxROM]]</td></tr> | ||
</table> | </table> | ||
† banks CHR-RAM, not CHR-ROM | |||
¹ has mapper-controlled single-screen mirroring. | |||
Revision as of 04:22, 1 August 2012
It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style.
How on earth do I make these HTML tables look good in wiki markup?
| GxROM-like | 8kB CHR bank bits | |||||||||
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | ||
| 32kB PRG bank bits | 0 | NROM | CNROM, 87 | oversize CNROM | ||||||
| 1 | AN1ROM¹ | MHROM | 79 | |||||||
| 2 | ANROM¹, BNROM | GNROM, 38 | 86 | 11, 140 | oversize 38 | |||||
| 3 | AOROM¹ | |||||||||
| 4 | oversize AxROM¹ | oversize GNROM | ||||||||
| 5 | ||||||||||
| 6 | ||||||||||
| 7 | ||||||||||
| 8 | oversize BNROM | |||||||||
| UxROM-like | 8kB CHR bank bits | |||||||
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | ||
| 16kB PRG bank bits | 2 | 168† | ||||||
| 3 | UNROM, 94 | 72, 78¹, 89¹, 93, 152¹ | ||||||
| 4 | UOROM, 180 | 70, 92 | ||||||
| 5 | ||||||||
| 6 | ||||||||
| 7 | ||||||||
| 8 | oversize UxROM | |||||||
† banks CHR-RAM, not CHR-ROM
¹ has mapper-controlled single-screen mirroring.
