Talk:Comparison of Nintendo mappers: Difference between revisions
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| [[iNES Mapper 011|11]]/[[iNES Mapper 144|144]] || 1 || 128 || 32 || 128 || 8 || V/H hardwired || No || Yes | | [[iNES Mapper 011|11]]/[[iNES Mapper 144|144]] || 1 || 128 || 32 || 128 || 8 || V/H hardwired || No || Yes | ||
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| [[NINA-001]] ([[iNES Mapper 034|34]]) || 6 || 64 || 32 || 64 || 4 + 4 || V hardwired || Yes || No | |||
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| [[iNES Mapper 036|36]] || ? || 128 || 32 || 128 || 8 || V hardwired || Unlikely || Likely | | [[iNES Mapper 036|36]] || ? || 128 || 32 || 128 || 8 || V hardwired || Unlikely || Likely |
Revision as of 01:00, 11 May 2013
Rare discrete logic
This table describes the mappers as they existed, as opposed to any obvious oversize extensions.
You probably don't actually want to use these.
iNES | Chips | Max PRG | PRG bank size | Max CHR | CHR bank size | Mirroring | PRG RAM? | Bus conflicts? |
---|---|---|---|---|---|---|---|---|
11/144 | 1 | 128 | 32 | 128 | 8 | V/H hardwired | No | Yes |
NINA-001 (34) | 6 | 64 | 32 | 64 | 4 + 4 | V hardwired | Yes | No |
36 | ? | 128 | 32 | 128 | 8 | V hardwired | Unlikely | Likely |
38 | 2 | 128 | 32 | 32 | 8 | V/H hardwired | Impossible | No |
70 | 3 | 256 | 16 + 16F | 128 | 8 | V/H hardwired | No | Likely |
72 | 4+speech | 256 | 16 + 16F | 128 | 8 | V/H hardwired | No | Yes |
77 | 4 | 512 | 32 | 32 + 6RAM | 2 | 4 | No | Likely |
78a | 5 | 128 | 16 + 16F | 128 | 8 | V/H switchable | No | Yes |
78b | 3 | 128 | 16 + 16F | 128 | 8 | 1 | No | Likely |
79 | 2 | 64 | 32 | 64 | 8 | V/H hardwired | No | No |
86 | 3+speech | 128 | 32 | 64 | 8 | V/H hardwired | Impossible | No |
87 | 2 | 32 | 32 | 8 | V/H hardwired | Impossible | No | |
89 | (2)† | 128 | 16 + 16F | 128 | 8 | 1 | No | Yes |
92 | 5+speech | 256 | 16F + 16 | 128 | 8 | V/H hardwired | No | Yes |
93 | (2)† | 128 | 16 + 16F | 8‡ | V/H hardwired | No | Yes | |
94 | 2 | 128 | 16 + 16F | 8 | V/H hardwired | No | Yes | |
96 | 3 | 128 | 32 | 32RAM | 4 + 4F / 16 | V/H hardwired | No | Likely |
99 | 0* | 40 | 8 + 24F | 16 | 8 | 4 | No | No |
101 | 2? | 32 | 32 | 8 | V hardwired | Impossible | No | |
140 | 3 | 128 | 32 | 128 | 8 | V/H hardwired | Impossible | No |
152 | 3 | 128 | 16 + 16F | 128 | 8 | 1 | No | Likely |
168 | 7 | 64 | 16 + 16F | 64RAM | 4F + 4 | V hardwired | No | No |
184 | (3)† | 32 | 32 | 4 + 4 | V/H hardwired | Impossible | No |
† Mappers 89, 93, and 184 exist as a single IC, however their functions are trivially described using a small number of 7400-series ICs, and likely contain multiple silicon dice that were wire bonded together in the same package.
‡ Mapper 93 is technically the same 89 other than mirroring, but it only commercially existed using 8kB of CHR-RAM
* the Vs System distributed its original games as five or six 8 KiB ROMs, and decoding on its mainboard allowed banking of CHR like CNROM. It is a little disingenuous to claim that 0 ICs were necessary for banking since the same functionality is not possible on a Famicom, however, banking was incrementally free.