Mapper: Difference between revisions
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|[[File:Mfr icon TXC.png|16px]] [[NES 2.0 Mapper 297|297]] | |[[File:Mfr icon TXC.png|16px]] [[NES 2.0 Mapper 297|297]] | ||
|[[File:Mfr icon | |[[File:Mfr icon Ntdec.png|16px]] [[NES 2.0 Mapper 298|298]] | ||
|[[File:Mfr icon TXC.png|16px]] [[NES 2.0 Mapper 299|299]] | |[[File:Mfr icon TXC.png|16px]] [[NES 2.0 Mapper 299|299]] | ||
|[[File:Mfr icon Missing.png|16px]] [[NES 2.0 Mapper 300|300]] | |[[File:Mfr icon Missing.png|16px]] [[NES 2.0 Mapper 300|300]] | ||
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|[[File:Mfr icon Daou.png|16px]] [[NES 2.0 Mapper 515|515]] | |[[File:Mfr icon Daou.png|16px]] [[NES 2.0 Mapper 515|515]] | ||
|[[File:Mfr icon Generic.png|16px]] [[NES 2.0 Mapper 516|516]] | |[[File:Mfr icon Generic.png|16px]] [[NES 2.0 Mapper 516|516]] | ||
|[[File:Mfr icon | |[[File:Mfr icon Generic.png|16px]] [[NES 2.0 Mapper 517|517]] | ||
|[[File:Mfr icon Subor.png|16px]] [[NES 2.0 Mapper 518|518]] | |[[File:Mfr icon Subor.png|16px]] [[NES 2.0 Mapper 518|518]] | ||
|[[File:Mfr icon pirate.png|16px]] [[NES 2.0 Mapper 519|519]] | |[[File:Mfr icon pirate.png|16px]] [[NES 2.0 Mapper 519|519]] |
Revision as of 06:37, 14 March 2018
The term mapper may refer to three separate things, all of which relate to the mapping, or translation, of the graphical (CHR) and program (PRG) ROMs or RAMs and nametables into the CPU's and PPU's address spaces:
- The circuitry that effects the connections between the Game Pak's PRG- and CHR-ROMs/RAMs and the NES Control Deck, whether it holds additional ICs to do so or not.
- An ASIC that handles the primary load of this task.
- The description that emulators use for a particular combination of circuitry and hardware on the game pak doing this and other tasks.
The hardware and circuitry on a cartridge's printed circuit board perform several functions:
- The above-explained mapping of the CHR and PRG chips into the NES's address space, which may be expanded by…
- (often) Bank switching: dynamically changing the mapping of cartridge ROM and RAM chips into CPU/PPU address spaces. By doing so, the cartridge may have more data than the address space would allow.
- (often) Using a battery-backed volatile RAM chip, or rarely an EEPROM, to maintain data between play sessions
- (always) Mirroring: controlling which way the nametables are arranged, as the NES only has two nametables' worth of CIRAM but four tables addressed.
- (rarely) Providing cartridge-side CHR-RAM or ROM to supplement or replace the nametable CIRAM (4-Screen mirroring).
- (commonly) Generating interrupts, esp. by scanline
- (rarely) Providing additional sound-generation. The Famicom sent its audio through the cartridge port to allow the cartridge to mix in additional channels; the NES does not without modification.
- (rarely) Altering how the attribute table is mapped to provide finer attribute control.
- and occasionally other sundry functions like fast multiplication.
Most mappers fall into one of two categories: discrete logic, and ASIC based. Some discrete logic mappers are susceptible to bus conflicts. Nintendo uses the term Memory Management Controller (or MMC for short) for its ASIC mappers ("Why Game Paks Never Forget" article in Nintendo Power) (note: it may have originally stood for "Multi Memory Controller", at least according to Japanese).
Discrete logic mappers are often referred to by the name of a board that they are commonly used in (e.g. "UNROM"). ASIC mappers are named after the ASIC (e.g. "MMC1" or "FME-7"), except in boards that use an ASIC in an unusual way (such as "TQROM", "TLSROM", or "NES-EVENT"). The emulation community generally refers to mappers by a numbering scheme that originated with the iNES emulator (e.g. "mapper 002").
The notation used in Disch's docs describing mappers is explained here.
To allocate a mapper number, you should have A. a hardware implementation or B. an emulator implementation and a sketch of hardware. You should also have a publicly-available dump of an existing commercial cart or most of a homebrew game written.
iNES 1.0 mapper grid
This is the plane 0 table. These mappers do not require a NES 2.0 header.
Most icons next to mapper numbers refer to publishers. Nintendo-made boards with numerous publishers get the Nintendo icon; Nintendo-made boards dominated by one publisher get that publisher's icon. Other icons refer to status:
- This mapper is "bad": it was used for something other than an actual cartridge. Some are mapper hacks designed for early disk-based copiers. Others are duplicate mappers that were assigned by mistake.
- "Bad" mappers reserved for use by tools, such as emulator internal use or private use during development of a new mapper.
- Mappers developed by members of the NES homebrew scene for cart releases.
- "Pirate MMC3" mappers. Many are used for unauthorized demakes of 16-bit fighting games.
- Mappers used primarily by illegally copied games, usually multicarts, sometimes single-game mapper hacks.
- Mappers for which we have some information but no identified manufacturer.
- Mappers that are not yet documented on this wiki. Do not assume undocumented mappers are currently unassigned; consult the source code for well-used emulators like Nestopia, FCEUX and Nintendulator.
Plane 1
Plane 1 (NES 2.0 mappers 256-511) is reserved for mappers used by games released outside the East Asian market.
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Plane 2
Plane 2 (NES 2.0 mappers 512-767) is reserved for mappers used by games released only in the East Asian market.
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See also
- Nintendo: MMC1, MMC2, MMC3, MMC4, MMC5 with audio, MMC6
- Konami: VRC1, VRC2, VRC3, VRC4, VRC6 with audio, VRC7 with audio, VRC IRQs
- Others: Color Dreams, Namco 163 with audio, NINA-001, NINA-03/06, SUBOR, Sunsoft FME-7 with audio (Sunsoft 5B)
- List of mappers with board names
- List of discrete logic mappers
- List of iNES mapper numbers
- Comparison of Nintendo mappers
- List of mapper names and corresponding iNES mapper numbers
- Hardware pinout, including mapper pinouts
References
- Nintendulator source code
- Nestopia source code
- FCEUX source code
- Planes proposal
External links
- Disch's detailed list of over 50 mappers at romhacking.net
- Kevtris's mapper checklist as implemented in his FPGA NES