Visual6502wiki/Motorola 6800
See Wikipedia for good technical and historical information and references on the Motorola 6800.
Chip Photos
We depackaged, deprocessed and photographed a later depletion-load version of the chip, which shows signs in the layout of the previous enhancement-load version. Ijor then captured polygons from the photos - here are JPEG images, which may be easier to explore than the svg format:
Medium size Full size (14Mbyte)
The recaptured polygon data closely resembles the original layout which defined the masks used to manufacture the chip, and is a great deal easier to study than the photographs.
Chip Simulator
From the polygons we were able to construct a netlist, and Segher then labelled many of interior nodes, and so we present our JavaScript simulator: (graphical mode) (non-graphical mode). As with our 6502 simulator, you can explore the layout and the behaviour, find signals and transistors by name, and share short test programs by URL.
Points of Interest
We've found these interesting features (more detail to be added):
- register circuit using resistive feedback and enhancement-style pullups
- data latch circuit using weak feedback transistor
- clock pulse shaping
- resistive bus pullup
- Manchester carry chain
- unexplained circuit isolating IRQ and HALT near PHI1 pin
Block Diagram
Here's the block diagram from the 1976 topology patent (See also this later patent.): File:M6800-arch.png
Resources
- Wikipedia article
- Datasheet (pdf) (Nick Reeder at Sinclair Community College)
- Instruction set summary (comlab at Oxford University)
- Programming Model (website for SB-assembler)
- US Patent 4090236 for single power supply NMOS microprocessor (filed 1976, granted '78) contains block diagrams, state transition diagrams, instruction decode tables, circuit and logic diagrams
- US Patent 3987418 for MOS microprocessor topography (filed 1974, granted '76) contains floorplan, low resolution layout mask images, block diagram
