6502 cycle times

I put this spreadsheet together because I didn't like the way the timing information was organized in other places. Some mnemonic/addressing mode combinations do not have an opcode and are marked with "x" because they are not legal instructions. I may add the illegal opcodes later. Cells marked with "+" mean add one cycle if a page boundary is crossed.

Mnemonic

Description

IMP

IMM

ZP

ZP,X

ZP,Y

ABS

ABS,X

ABS,Y

IND

IND,X

IND,Y

ACC

ADC

ADd with Carry

x

2

3

4

x

4

4+

4+

x

6

5+

x

AND

bitwise AND with accumulator

x

2

3

4

x

4

4+

4+

x

6

5+

x

ASL

Arithmetic Shift Left

x

x

5

6

x

6

7

x

x

x

x

x

BIT

test BITs

x

x

3

x

x

4

x

x

x

x

x

x

BRK

BreaK

7

x

x

x

x

x

x

x

x

x

x

x

CMP

CoMPare accumulator

x

2

3

4

x

4

4+

4+

x

6

5+

x

CPX

ComPare X register

x

2

3

x

x

4

x

x

x

x

x

x

CPY

ComPare Y register

x

2

3

x

x

4

x

x

x

x

x

x

DEC

DECrement memory

x

x

5

6

x

6

7

x

x

x

x

x

EOR

bitwise Exclusive OR

x

2

3

4

x

4

4+

4+

x

6

5+

x

INC

INCrement memory

x

x

5

6

x

6

7

x

x

x

x

x

JMP

JuMP

x

x

x

x

x

3

x

x

5

x

x

x

JSR

Jump to SubRoutine

x

x

x

x

x

6

x

x

x

x

x

x

LDA

LoaD Accumulator

x

2

3

4

x

4

4+

4+

x

6

5+

x

LDX

LoaD X register

x

2

3

x

4

4

x

4+

x

x

x

x

LDY

LoaD Y register

x

2

3

4

x

4

4+

x

x

x

x

x

LSR

Logical Shift Right

x

x

5

6

x

6

7

x

x

x

x

2

NOP

No Operation

2

x

x

x

x

x

x

x

x

x

x

x

ORA

bitwise OR with Accumulator

x

2

3

4

x

4

4+

4+

x

6

5+

x

ROL

Rotate Left

x

x

5

6

x

6

7

x

x

x

x

2

ROR

Rotate Right

x

x

5

6

x

6

7

x

x

x

x

2

RTI

ReTurn from Interrupt

6

x

x

x

x

x

x

x

x

x

x

x

RTS

ReTurn from Subroutine

6

x

x

x

x

x

x

x

x

x

x

x

SBC

SuBtract with Carry

x

2

3

4

x

4

4+

4+

x

6

5+

x

STA

Store Accumulator

x

x

3

4

x

4

5

5

x

6

6

x

STX

Store X register

x

x

3

x

4

4

x

x

x

x

x

x

STY

Store Y register

x

x

3

4

x

4

x

x

x

x

x

x