CPU pinout

Active-Low signals are indicated by a "/".

CLK is the 21.47727 MHz clock input. Internally, the real clock is derived by dividing the input clock frequency by 12.

STR stands for "strobe" and goes to the controller ports ($4016 output latch bit 0), D0 on the controller port pinout

/OE1 and /OE2 also go to the controller ports, and each enable the output of their respective controller, if present.

E44 and E45 are respectively the expansion port pins 44 and 45 and latched copies of bits 1 and 2 written to $4016

R/W is the read/write signal, which is used to indicate operations of the same names. Low is write.

/NMI and /IRQ are the two interrupt pins. See the 6502 manual for more detailed explanation.

M2 can be considered as a "signals ready" pin. It is actually a delayed form of CLK. In 6502 documentation it's called φ2

IOE (tentative name) (pin 30) is special: normally it is grounded in the NES, Famicom, PC10/VS. NES and other Nintendo Arcade Boards (Popeye and Donkey Kong 3), but if it is pulled high, all of the memory-mapped I/O ports (APU/Serial Controller area at $4000-$4015) are disabled, and the chip acts like a 'normal' 6502, just without decimal mode and with the pinout and clock divider of an RP2A03/RP2A07. (What effect does this have on controller ports at $4016/$4017, and how does it interact with $4018-$401A?)

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