UNIF/COOLBOY

UNIF MAPR COOLBOY describes a mapper designed for MMC3 multicarts. Unlike almost all other mappers, it is currently being manufactured. (Search for "COOLBOY" on eBay or AliExpress).

It adds four extra registers in lieu of (in addition to?) the normal PRG-RAM, gated by the normal MMC3 PRG-RAM access. FCEUX claims that all four of these registers are cleared on power up and reset.

Registers

Note: Much like with Nintendo's first-party MMC3 multicarts, you MUST enable writes to the MMC3's PRG RAM to write to these registers.

Mask: $E003

$6000

 7  bit  0
 ---- ----
 ABCC DEEE
 |||| ||||
 |||| |+++-- PRG offset (PRG A19, A18, A17)
 |||| +----- Alternate CHR A17
 ||++------- PRG offset (PRG A24, A23)
 |+--------- PRG mask (PRG A17 from 0: MMC3; 1: offset)
 +---------- CHR mask (CHR A17 from 0: MMC3; 1: alternate)

$6001

 7  bit  0
 ---- ----
 GHIJ KKLx
 |||| |||
 |||| ||+--- GNROM mode bank PRG size (1: 32 KiB bank, PRG A14=CPU A14; 0: 16 KiB bank, PRG A14=offset A14)
 |||+-++---- PRG offset (in order: PRG A20, A22, A21)
 ||+-------- PRG mask (PRG A19 from 0: offset; 1: MMC3)
 |+--------- PRG mask (PRG A18 from 0: MMC3; 1: offset)
 +---------- PRG mask (PRG A20 from 0: offset; 1: MMC3)

$6002

 7  bit  0
 ---- ----
 xxxx MMMM
      ||||
      ++++-- CHR offset for GNROM mode (CHR A16, A15, A14, A13)

$6003

 7  bit  0
 ---- ----
 NPxP QQRx
 || | |||
 || | +++--- PRG offset for GNROM mode (PRG A16, A15, A14)
 || +------- 1: GNROM mode; 0: MMC3 mode
 |+-+------- Banking mode
 |+--------- "Weird mode"
 +---------- Lockout (prevent further writes to these four registers, only works when mode = $00 or $40.)

Register interpretation

Banking mode = $00

“Normal” oversize MMC3 mode.

PRG offset is expressed as a multiple of 128 KiB = CCKKJEEE

PRG mask controls whether each of A17 through A20 connect to MMC3 or to the above JEEE LSBs.

CHR A17 is controlled by MMC3 and the two bits in register $6000.

Lockout works in this mode.

Banking mode = $10

“Normal” GNROM mode.

When in 32 KiB mode (see $6001.1), PRG offset as a multiple of 32 KiB is CCKKJEEEQQ.

When in 16 KiB mode, PRG offset as a multiple of 16 KiB is CCKKJEEEQQR.

PRG mask registers STILL AFFECT THIS MODE, allowing weird splicing of MMC3 banking (granularity of 128 KiB) overlaying GNROM-style banking.

CHR offset, as a multiple of 8 KiB is DMMMM. BUT the CHR A17 multiplexer still works, so the MSB of the CHR banks still can come from the MMC3.

Lockout DOES NOT work in this mode.

Banking mode = $40

“Weird” MMC3 mode.

If MMC3 PRG ROM bank mode is "normal" (8+8+16F), then the PRG banks at 0xC000 and 0xE000 are fixed to 8 KiB bank 0, instead of 0xFE and 0xFF. There is reported no effect at all when MMC3 PRG ROM bank mode is inverted (8F+8+8+8F).

The second half of each of the 2 KiB CHR banks is replaced with bank 0, and the LSB of MMC3 registers 0 and 1 work (instead of being replaced by PPU A10).

Otherwise, behaves as “normal” MMC3 mode above.

Banking mode = $50

“Weird” GNROM-ish mode.

Combine the rules mentioned for PRG above for “Normal” GNROM mode with “Weird” MMC3 mode.

The 1 KiB slices of the MMC3 2 KiB CHR banks that would have been forced to be bank 0 in “weird” MMC3 mode have their MSB (CHR A17) line set to 0.

Lockout DOES NOT work in this mode.