User:Lidnariq/Microchip-style PPU documentation
Just so I can find these again easily:
Microchip-style documentation format
REGISTER: PPUCTRL: PPU properties
W-0/0 | W-0/0 | W-0/0 | W-0/0 | W-0/0 | W-0/0 | W-0/0 | W-0/0 |
NMIEN | EXTOUTEN | SPR8x16 | BKGD | SPR | INC32 | Y8 | X8 |
---|---|---|---|---|---|---|---|
bit 7 | bit 0 |
Legend | ||
R = Readable bit | W = Writable bit | U = Unimplemented bit, read as open bus |
u = bit is unchanged | x = bit is unknown | -n/n = value on Power-on/all other resets |
1 = bit is set | 0 = bit is cleared | q = value depends on conditions |
bit 7 | NMIEN: NMI enable 1 = NMI is triggered at start of vblank, after 1 (or 51) post-render scanlines |
bit 6 | EXTOUTEN: External output Enable 1 = output bottom 4 bits of color on EXT pins |
bit 5 | SPR8x16: Sprites size 1 = All sprites are 8x16 |
bit 4 | BKGD: Background tile location 1 = Background tiles are fetched from PPU $1xxx |
bit 3 | SPR: Sprite tile location 1 = Sprite tiles are fetched from PPU $1xxx |
bit 2 | INC32: PPU address autoincrement step size 1 = PPU address increments by 32 after reads or writes to PPUDATA |
bit 1 | Y8: 240s bit of Y scroll position 1 = Rendering will start in nametable at $2800 or $2C00 |
bit 0 | X8: 256s bit of X scroll position 1 = Rendering will start in nametable at $2400 or $2C00 |