VRC1

The Konami VRC1 is an ASIC mapper. The iNES format assigns iNES Mapper 075 to VRC1.

Overview

• PRG ROM size: Up to 128 KB
• PRG ROM bank size: 8 KB at $8000, $A000, and $C000
• PRG RAM: None
• CHR bank size: 4 KB
• Nametable mirroring: Controlled by mapper
• Subject to bus conflicts: No

See VRC1 pinout for chip pinout.

Registers

PRG Select 0 ($8000-$8FFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $8000

PRG Select 1 ($A000-$AFFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $A000

PRG Select 2 ($C000-$CFFF)

7  bit  0
---------
.... PPPP
     ||||
     ++++- Select 8 KB PRG ROM at $C000

Mirroring Control, CHR bits ($9000-$9FFF)

7  bit  0
---------
.... .BAM
      |||
      ||+- Mirroring  (0: Vertical; 1: Horizontal)
      |+-- High Bit of 4 KB CHR bank at PPU $0000
      +--- High Bit of 4 KB CHR bank at PPU $1000

The mirroring bit is ignored if the cartridge is wired for 4-screen VRAM, as is typical for Vs. System games using the VRC1.

CHR Select 0 ($E000-$EFFF)

7  bit  0
---------
.... CCCC
     ||||
     ++++- Low 4 bits of 4 KB CHR bank at PPU $0000

These bits combined with bit 1 of $9000 make a 5-bit CHR selection.

CHR Select 1 ($F000-$FFFF)

7  bit  0
---------
.... CCCC
     ||||
     ++++- Low 4 bits of 4 KB CHR bank at PPU $1000

These bits combined with bit 2 of $9000 make a 5-bit CHR selection.

Disch's Notes

 Here are Disch's original notes:  
 ========================
 =  Mapper 075          =
 ========================
 
 
 aka:
 --------------------------
 VRC1
 
 
 Example Games:
 --------------------------
 Tetsuwan Atom
 Ganbare Goemon! - Karakuri Douchuu
 
 
 
 Registers:
 --------------------------
 
 Range,Mask:   $8000-FFFF, $F000
 
   $8000:  [.... PPPP]   PRG Reg 0 (8k @ $8000)
   $A000:  [.... PPPP]   PRG Reg 1 (8k @ $A000)
   $C000:  [.... PPPP]   PRG Reg 2 (8k @ $C000)
 
   $9000:  [.... .BAM]   Mirroring, CHR reg high bits
      M = Mirroring (0=Vert, 1=Horz)
      A = High bit of CHR Reg 0
      B = High bit of CHR Reg 1
 
   $E000:  [.... CCCC]   Low 4 bits of CHR Reg 0 (4k @ $0000)
   $F000:  [.... CCCC]   Low 4 bits of CHR Reg 1 (4k @ $1000)
 
 
 PRG Setup:
 ---------------------------
       $8000   $A000   $C000   $E000  
     +-------+-------+-------+-------+
     | $8000 | $A000 | $C000 | { -1} |
     +-------+-------+-------+-------+
 
 
 CHR Setup:
 ---------------------------
 
   CHR regs are 5 bits wide.  The low 4 bits of each reg are set by $E000 and $F000, and the high bit is taken
 from the appropriate bits of $9000.
 
       $0000   $0400   $0800   $0C00   $1000   $1400   $1800   $1C00 
     +-------------------------------+-------------------------------+
     |       $9000.1 + $E000         |       $9000.2 + $F000         |
     +-------------------------------+-------------------------------+