MMC1 pinout

MMC1 Chip: (24 pin shrink-DIP)

Comes in several varieties: 'MMC1', 'MMC1A', and 'MMC1B2'

                .--\/--.
 PRG A14 (r) <- |01  24|  - +5V
 PRG A15 (r) <- |02  23| <- M2/Phi2/CPU Clk        
 PRG A16 (r) <- |03  22| <- PRG A13 (s)
 PRG A17 (r) <- |04  21| <- PRG A14 (n)
 PRG /CE (r) <- |05  20| <- PRG /CE (n)
 WRAM CE (w) <- |06  19| <- PRG D7 (s)
 CHR A12 (r) <- |07  18| <- PRG D0 (s)
 CHR A13 (r) <- |08  17| <- PRG R/W 
 CHR A14 (r) <- |09  16| -> CIRAM A10 (n)
 CHR A15 (r) <- |10  15| <- CHR A12 (n)
 CHR A16 (r) <- |11  14| <- CHR A11 (s)
         GND  - |12  13| <- CHR A10 (s)
                `------'

(r) - this pin connects to the ROM chips only
(n) - this pin connects to the NES connector only
(s) - this pin is shared with the NES connector and ROM chips
(w) - this pin connects to the WRAM only

As with many other ASIC mappers, parts of the pinout are often repurposed:

SNROM:

          n/c <- |08  17| <- PRG R/W 
          n/c <- |09  16| -> CIRAM A10 (n)
          n/c <- |10  15| <- CHR A12 (n)
 WRAM /CE (w) <- |11  14| <- CHR A11 (s)
          GND  - |12  13| <- CHR A10 (s)
                 `------'

SOROM:

          n/c <- |08  17| <- PRG R/W 
          n/c <- |09  16| -> CIRAM A10 (n)
 WRAM A14 (w) <- |10  15| <- CHR A12 (n)
          n/c <- |11  14| <- CHR A11 (s)
          GND  - |12  13| <- CHR A10 (s)
                 `------'

SOROM is actually implemented using the WRAMs' /CE inputs and an inverter to select only one RAM at a time.

SUROM:

          n/c <- |08  17| <- PRG R/W 
          n/c <- |09  16| -> CIRAM A10 (n)
          n/c <- |10  15| <- CHR A12 (n)
  PRG A18 (r) <- |11  14| <- CHR A11 (s)
          GND  - |12  13| <- CHR A10 (s)
                 `------'

SXROM:

          n/c <- |08  17| <- PRG R/W 
 WRAM A14 (w) <- |09  16| -> CIRAM A10 (n)
 WRAM A15 (w) <- |10  15| <- CHR A12 (n)
  PRG A18 (r) <- |11  14| <- CHR A11 (s)
          GND  - |12  13| <- CHR A10 (s)
                 `------'

Since the CHR A12 input's only purpose is to switch the CHR A12 .. A16 outputs, it's not clear why Nintendo didn't tie the MMC1's CHR A12 input low and connect CHR RAM A12 directly to the cartridge edge.