Talk:Comparison of Nintendo mappers

Rare discrete logic

This table describes the mappers as they existed, as opposed to any obvious oversize extensions.

You probably don't actually want to use these, especially not #78 with its ambiguous mirroring.

iNES	Chips	Max PRG	PRG bank size	Max CHR	CHR bank size	Mirroring	PRG RAM?	Bus conflicts?
11	1	128	32	128	8	V/H hardwired	No	Yes
38	2	128	32	32	8	V/H hardwired	Impossible	No
70	3	256	16 + 16F	128	8	V/H hardwired	No	Likely
72	4+speech	256	16 + 16F	128	8	V/H hardwired	No	Yes
77	4	512	32	32 + 6RAM	2	4	No	Likely
78a	5	128	16 + 16F	128	8	V/H switchable	No	Yes
78b	3	128	16 + 16F	128	8	1	No	Likely
79	2	64	32	64	8	V/H hardwired	No	No
86	3+speech	128	32	64	8	V/H hardwired	Impossible	No
87	2	32		32	8	V/H hardwired	Impossible	No
89	(2)†	128	16 + 16F	128	8	1	No	Yes
92	5+speech	256	16F + 16	128	8	V/H hardwired	No	Yes
93	(2)†	128	16 + 16F	8‡		V/H hardwired	No	Yes
94	2	128	16 + 16F	8		V/H hardwired	No	Yes
96	3	128	32	32RAM	16	V/H hardwired	No	Likely
140	3	128	32	128	8	V/H hardwired	Impossible	No
152	3	128	16 + 16F	128	8	1	No	Likely
184	(3)†	32		32	4 + 4	V/H hardwired	Impossible	No

† Mappers 89, 93, and 184 exist as a single IC, however their functions are trivially described using a small number of 7400-series ICs, and likely contain multiple silicon dice that were wire bonded together in the same package.

‡ Mapper 93 is technically the same 89 other than mirroring, but it only commercially existed using 8kB of CHR-RAM