Talk:Comparison of Nintendo mappers

From NESdev Wiki
Revision as of 04:04, 29 February 2012 by Lidnariq (talk | contribs) (finish bus conflicts column)
Jump to navigationJump to search

Rare discrete logic

You probably don't actually want to use these, especially not #78.

iNES Chips Max PRG PRG bank size Max CHR CHR bank size Mirroring PRG RAM? Bus conflicts?
11 1 128 32 128 8 V/H hardwired No Yes
38 2 128 32 32 8 V/H hardwired Impossible No
70 3 256 16 + 16F 128 8 V/H hardwired No Likely
72 4+speech 256 16 + 16F 128 8 V/H hardwired No Yes
77 4 512 32 32 + 6RAM 2 4 No Likely
78a 5 128 16 + 16F 128 8 V/H switchable No Likely
78b 3 128 16 + 16F 128 8 1 No Likely
79 2 64 32 64 8 V/H hardwired No No
86 3+speech 128 32 64 8 V/H hardwired Impossible No
87 2 32 32 8 V/H hardwired Impossible No
92 5+speech 256 16F + 16 128 8 V/H hardwired No Yes
96 3 128 32 32RAM 16 V/H hardwired No Likely
140 3 128 32 128 8 V/H hardwired Impossible No
152 3 128 16 + 16F 128 8 1 No Likely