INES Mapper 144: Difference between revisions

From NESdev Wiki
Jump to navigationJump to search
(RE'd, stared at incoherently, groaned)
 
m (rephrase to less awkward and hopefully more clear)
Line 2: Line 2:
[[iNES Mapper 144]], allocated for the game ''Death Race'', describes a intentionally defective variant of the [[Color Dreams]] board ([[iNES Mapper 011|11]]).
[[iNES Mapper 144]], allocated for the game ''Death Race'', describes a intentionally defective variant of the [[Color Dreams]] board ([[iNES Mapper 011|11]]).


This game's PCB (labelled '''50282''') is almost identical to the revision B Color Dreams boards, but with the addition of a 300Ω resistor between CPU D0 and both the mapper hardware and the ROM. In this way, the ROM always wins bus conflicts ''but just for the LSB''.
This game's PCB (labelled '''50282''') is almost identical to the revision B Color Dreams boards, but a 300Ω resistor was added between CPU D0 and the combination of mapper hardware and ROM. This addition means that ''only'' the ROM's ''least significant bit'' always wins bus conflicts.


Nestopia-1.4.0 implements this as RealData = (WrittenData & ROM[address]) | (ROM[address] & 1)
Nestopia-1.4.0 implements this as <code>EffectiveData = (WrittenData & ROM[address]) | (ROM[address] & 1)</code>


FCEUX-2.1.5 works around this by ignoring writes to 0x8000
FCEUX-2.1.5 works around this by ignoring writes to 0x8000


The most succinct description is RealData = (ROM[address] & (WrittenData|1))
The most succinct description is <code>EffectiveData = (ROM[address] & (WrittenData|1))</code>

Revision as of 01:19, 26 October 2012

iNES Mapper 144, allocated for the game Death Race, describes a intentionally defective variant of the Color Dreams board (11).

This game's PCB (labelled 50282) is almost identical to the revision B Color Dreams boards, but a 300Ω resistor was added between CPU D0 and the combination of mapper hardware and ROM. This addition means that only the ROM's least significant bit always wins bus conflicts.

Nestopia-1.4.0 implements this as EffectiveData = (WrittenData & ROM[address]) | (ROM[address] & 1)

FCEUX-2.1.5 works around this by ignoring writes to 0x8000

The most succinct description is EffectiveData = (ROM[address] & (WrittenData|1))