User:Zzo38/Mapper B: Difference between revisions
From NESdev Wiki
Jump to navigationJump to search
(Original forum post describing planes) |
No edit summary |
||
| Line 10: | Line 10: | ||
Banks are switched by writing the 8K bank number into the low four bits of registers in the same address space where the banks are at. There is no bus conflicts. | Banks are switched by writing the 8K bank number into the low four bits of registers in the same address space where the banks are at. There is no bus conflicts. | ||
Sometimes there may be PRG RAM at $6000-$7FFF. Usually there is 8K CHR RAM, although | Sometimes there may be PRG RAM at $6000-$7FFF. Usually there is 8K CHR RAM, although it would also work with 8K CHR ROM. | ||
== References == | == References == | ||
* [http://forums.nesdev.org/viewtopic.php?t=2669 Original forum post] (November 2006) | * [http://forums.nesdev.org/viewtopic.php?t=2669 Original forum post] (November 2006) | ||
Revision as of 01:59, 18 July 2013
This mapper was originally described by tepples as "Mapper 670" after its use of a 74HC670 prior to the division of the NES 2.0 expanded mapper space into planes.
CPU address space:
- $8000-$9FFF: Switchable bank 0
- $A000-$BFFF: Switchable bank 1
- $C000-$DFFF: Switchable bank 2
- $E000-$EFFF: Switchable bank 3
- $F000-$FFFF: Fixed to last bank
Banks are switched by writing the 8K bank number into the low four bits of registers in the same address space where the banks are at. There is no bus conflicts.
Sometimes there may be PRG RAM at $6000-$7FFF. Usually there is 8K CHR RAM, although it would also work with 8K CHR ROM.
References
- Original forum post (November 2006)
