User:Lidnariq/Mapper thoughts: Difference between revisions
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(idea 1) |
(ok, use NAND4 instead of NAND3 to fit back into 4 discrete-logic ICs.) |
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| Line 8: | Line 8: | ||
** One selects a 32 KiB slice of PRG | ** One selects a 32 KiB slice of PRG | ||
** The other selects an 8 KiB slice of CHR RAM. | ** The other selects an 8 KiB slice of CHR RAM. | ||
* | * 1 × 74'139 | ||
* 1 × 74' | * 1 × 74'20 | ||
** One | ** One NAND4 produces /INTSEL=NAND3(M2,/ROMSEL,A14,A13) and one decoder produces /RD6xxx, /WR6xxx, /RD7xxx, and /WR7xxx. | ||
** | ** Other NAND4 produces /RD. | ||
** 2nd decoder selects RAM or ROM as appropriate. | ** 2nd decoder selects RAM or ROM as appropriate. | ||
* CS8900A (or possibly RTL8029) | * CS8900A (or possibly RTL8029) | ||
* Ethernet transformer | * Ethernet transformer | ||
| Line 21: | Line 19: | ||
===Memory map=== | ===Memory map=== | ||
* $ | * $6xxx - CS8900A | ||
** http://www.cirrus.com/en/products/cs8900a.html | ** http://www.cirrus.com/en/products/cs8900a.html | ||
** As with the C64 NIC, it does not present the memory-mappable portion of the CS8900A | ** As with the C64 NIC, it does not present the memory-mappable portion of the CS8900A | ||
** CS8900A does not have a separate I/O enable, just /IOR and /IOW; address bus must be stable before these signals fall | ** CS8900A does not have a separate I/O enable, just /IOR and /IOW; address bus must be stable before these signals fall: Thus, /RD6xxx and /WR6xxx are connected to the CS8900A | ||
** Why does the 64NIC+ not connect /IRQ ? | ** Why does the 64NIC+ not connect /IRQ ? | ||
** Obviously no DMA support either. (Do we want to support OAM DMA from ethernet?) | ** Obviously no DMA support either. (Do we want to support OAM DMA from ethernet?) | ||
* $ | * READS from $7xxx - latching CPU A0..A3: PRG bank '161 (0,1,2,3 = ROM; C,D,E,F=RAM). Q3 determines which IC. Cleared on hardware reset. | ||
* $7xxx - CHR '161 | * WRITES to $7xxx - latching CPU D0..D3: CHR bank '161 | ||
* $8000-$FFFF: PRG ROM or RAM, according to value at $ | * $8000-$FFFF: PRG ROM or RAM, according to value at $7xxx. | ||
Revision as of 01:02, 13 March 2015
EtherNES 1
A cartridge designed to provide ethernet is as simple a manner as practical, for use with Contiki. The design is intentionally similar to a C64 ethernet cartridge, even though the CS8900A is comparatively expensive.
Parts
- 1 × SST39SF010A, 128 KiB FLASH EEPROM, for booting
- 2 × AS6C1008, 128 KiB static RAM, one each for PRG RAM and CHR RAM
- 2 × 74'161, both set up to clear on reset.
- One selects a 32 KiB slice of PRG
- The other selects an 8 KiB slice of CHR RAM.
- 1 × 74'139
- 1 × 74'20
- One NAND4 produces /INTSEL=NAND3(M2,/ROMSEL,A14,A13) and one decoder produces /RD6xxx, /WR6xxx, /RD7xxx, and /WR7xxx.
- Other NAND4 produces /RD.
- 2nd decoder selects RAM or ROM as appropriate.
- CS8900A (or possibly RTL8029)
- Ethernet transformer
See also http://www.go4retro.com/products/64nic/
Memory map
- $6xxx - CS8900A
- http://www.cirrus.com/en/products/cs8900a.html
- As with the C64 NIC, it does not present the memory-mappable portion of the CS8900A
- CS8900A does not have a separate I/O enable, just /IOR and /IOW; address bus must be stable before these signals fall: Thus, /RD6xxx and /WR6xxx are connected to the CS8900A
- Why does the 64NIC+ not connect /IRQ ?
- Obviously no DMA support either. (Do we want to support OAM DMA from ethernet?)
- READS from $7xxx - latching CPU A0..A3: PRG bank '161 (0,1,2,3 = ROM; C,D,E,F=RAM). Q3 determines which IC. Cleared on hardware reset.
- WRITES to $7xxx - latching CPU D0..D3: CHR bank '161
- $8000-$FFFF: PRG ROM or RAM, according to value at $7xxx.
