Clock rate

The clock rate of various components in the NES differs between consoles in the USA and Europe due to the different television standards used (NTSC M vs. PAL B). The color encoding method used by the NES (see NTSC video) requires that the master clock frequency be six times that of the color subcarrier, but this frequency is about 24% higher on PAL than on NTSC. In addition, PAL has more scanlines per field and fewer fields per second than NTSC. Furthermore, Nintendo inexplicably divided the PAL CPU's master clock by 16 instead of 15, resulting in a significantly slower CPU and a different ratio between CPU and PPU speeds. So the main differences between the NTSC and PAL PPUs are as follows:

Property	NTSC	PAL	Dendy
Master clock speed	21.477272 MHz ± 40 Hz 236.25 MHz / 11 by definition	26601712 Hz ± ? 26601712.5 Hz by definition	Like PAL
PPU clock speed	21.477272 MHz / 4	26.601712 MHz / 5	Like PAL
Corresponding CPU clock speed	21.47MHz / 12 = 1.78977267 MHz 3 dots per CPU cycle	26.601712 MHz / 16 = 1.662607 MHz 3 1/5 dots per CPU cycle	26.601712 MHz / 15 = 1.773448 MHz 3 dots per CPU cycle
Height of picture	240 scanlines	240 scanlines	Like PAL
Nominal visible picture height (see Overscan)	224 scanlines	268 scanlines	Like PAL
"Post-render" blanking lines between end of picture and NMI	1 scanline	1 scanline	51 scanlines
Length of vertical blanking after NMI	20 scanlines	70 scanlines	20 scanlines
"Pre-render" lines between vertical blanking and next picture	1 scanline	1 scanline	Like PAL
Total number of dots per frame	341*261 + 340.5 = 89341.5 (pre-render line is one dot shorter in every other frame)	341*312 = 106392	Like PAL
Vertical scan rate	60.0988 Hz	50.0070 Hz	Like PAL

Other than these differences and color encoding, the NTSC and PAL PPUs function exactly the same.

The authentic NES sold in Brazil is an NTSC NES with an adapter board to turn the NTSC video into PAL/M video, a variant of PAL with frequencies much closer to those of NTSC.

Dendy is a clone of the Famicom distributed by Steepler and sold in Russia. Because not many people in the English-speaking NESdev community have a Dendy, its precise differences from the authentic Nintendo hardware are not completely understood, and the values above are partly conjecture. But it is known that the chipset in Dendy and several other PAL famiclones is designed for compatibility with Famicom games, including games with CPU cycle counting mappers (e.g. VRC4) and games that use a cycle-timed NMI handler (e.g. Balloon Fight). This explains the faster CPU divider and longer post-render period vs. the authentic PAL NES.

To compensate for these speed differences, you can detect the TV system at power-on.