74139: Difference between revisions
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Each side of the chip is a decoder with an active low enable from a 2-bit address to four active low signals. | Each side of the chip is a decoder with an active low enable from a 2-bit address to four active low signals. | ||
The two decoders can be wired independently, or a /Y from one decoders can be wired to the /E on the other to calculate more complex combinational logic functions. | The two decoders can be wired independently, or a /Y from one decoders can be wired to the /E on the other to calculate more complex combinational logic functions. | ||
== 74139 Pinout == | |||
.---v---. | |||
1/E -o|1 16|-- Vcc | 1/E -o|1 16|-- Vcc | ||
1A0 --|2 15|o- 2/E | 1A0 --|2 15|o- 2/E | ||
Line 13: | Line 13: | ||
GND --|8 9|o- 2/Y3 | GND --|8 9|o- 2/Y3 | ||
`-------' | `-------' | ||
== Signal descriptions == | |||
* /E, A0, A1 are inputs | |||
* /Y0, /Y1, /Y2, /Y3 are outputs | |||
Each side computes the following function: | Each side computes the following function: | ||
Revision as of 04:22, 31 January 2013
The 74139 (common variants 74LS139, 74HC139) is a dual 2-to-4-line decoder/demultiplexer in the 7400 series. Each side of the chip is a decoder with an active low enable from a 2-bit address to four active low signals. The two decoders can be wired independently, or a /Y from one decoders can be wired to the /E on the other to calculate more complex combinational logic functions.
74139 Pinout
.---v---. 1/E -o|1 16|-- Vcc 1A0 --|2 15|o- 2/E 1A1 --|3 14|-- 2A0 1/Y0 -o|4 13|-- 2A1 1/Y1 -o|5 12|o- 2/Y0 1/Y2 -o|6 11|o- 2/Y1 1/Y3 -o|7 10|o- 2/Y2 GND --|8 9|o- 2/Y3 `-------'
Signal descriptions
- /E, A0, A1 are inputs
- /Y0, /Y1, /Y2, /Y3 are outputs
Each side computes the following function:
/E | A1 | A0 | /Y0 | /Y1 | /Y2 | /Y3 |
---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 1 | 1 | 1 |
0 | 0 | 1 | 1 | 0 | 1 | 1 |
0 | 1 | 0 | 1 | 1 | 0 | 1 |
0 | 1 | 1 | 1 | 1 | 1 | 0 |
1 | x | x | 1 | 1 | 1 | 1 |
The NES contains a 74LS139 to produce the PRG /CE signal from M2 and A15.