Talk:Comparison of Nintendo mappers: Difference between revisions

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m (→‎Rare discrete logic: mapper 79 isn't well-defined for more than 4 bits of state.)
m (Start adding which boards are bus-conflict free)
Line 2: Line 2:
You probably don't actually want to use these, especially not #78.
You probably don't actually want to use these, especially not #78.
{| class="tabular"
{| class="tabular"
! iNES || Chips || Max PRG || PRG bank size || Max CHR || CHR bank size || Mirroring || PRG RAM?
! iNES || Chips || Max PRG || PRG bank size || Max CHR || CHR bank size || Mirroring || PRG RAM? || Bus conflicts?
|-
|-
| [[iNES Mapper 011|11]] || 1 || 128 || 32 || 128 || 8 || V/H hardwired || No
| [[iNES Mapper 011|11]] || 1 || 128 || 32 || 128 || 8 || V/H hardwired || No
|-
|-
| [[iNES Mapper 038|38]] || 2 || 128 || 32 || 32 || 8 || V/H hardwired || Impossible
| [[iNES Mapper 038|38]] || 2 || 128 || 32 || 32 || 8 || V/H hardwired || Impossible || No
|-
|-
| [[iNES Mapper 070|70]] || 3 || 256 || 16 + 16F || 128 || 8 || V/H hardwired || No
| [[iNES Mapper 070|70]] || 3 || 256 || 16 + 16F || 128 || 8 || V/H hardwired || No
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| [[iNES Mapper 078|78b]] || 3 || 128 || 16 + 16F || 128 || 8 || 1 || No
| [[iNES Mapper 078|78b]] || 3 || 128 || 16 + 16F || 128 || 8 || 1 || No
|-
|-
| [[iNES Mapper 079|79]] || 2 || 64 || 32 || 64 || 8 || V/H hardwired || No
| [[iNES Mapper 079|79]] || 2 || 64 || 32 || 64 || 8 || V/H hardwired || No || No
|-
|-
| [[iNES Mapper 086|86]] || 3+speech || 128 || 32 || 64 || 8 || V/H hardwired || Impossible
| [[iNES Mapper 086|86]] || 3+speech || 128 || 32 || 64 || 8 || V/H hardwired || Impossible || No
|-
|-
| [[iNES Mapper 087|87]] || 2 || 32 ||  || 32 || 8 || V/H hardwired || Impossible
| [[iNES Mapper 087|87]] || 2 || 32 ||  || 32 || 8 || V/H hardwired || Impossible || No
|-
|-
| [[iNES Mapper 092|92]] || 5+speech || 256 || 16F + 16 || 128 || 8 || V/H hardwired || No
| [[iNES Mapper 092|92]] || 5+speech || 256 || 16F + 16 || 128 || 8 || V/H hardwired || No
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| [[iNES Mapper 096|96]] || 3 || 128 || 32 || 32RAM || 16 || V/H hardwired || No
| [[iNES Mapper 096|96]] || 3 || 128 || 32 || 32RAM || 16 || V/H hardwired || No
|-
|-
| [[iNES Mapper 140|140]] || 3 || 128 || 32 || 128 || 8 || V/H hardwired || Impossible
| [[iNES Mapper 140|140]] || 3 || 128 || 32 || 128 || 8 || V/H hardwired || Impossible || No
|-
|-
| [[iNES Mapper 152|152]] || 3 || 128 || 16 + 16F || 128 || 8 || 1 || No
| [[iNES Mapper 152|152]] || 3 || 128 || 16 + 16F || 128 || 8 || 1 || No
|}
|}

Revision as of 23:47, 28 February 2012

Rare discrete logic

You probably don't actually want to use these, especially not #78.

iNES Chips Max PRG PRG bank size Max CHR CHR bank size Mirroring PRG RAM? Bus conflicts?
11 1 128 32 128 8 V/H hardwired No
38 2 128 32 32 8 V/H hardwired Impossible No
70 3 256 16 + 16F 128 8 V/H hardwired No
72 4+speech 256 16 + 16F 128 8 V/H hardwired No
77 4 512 32 32 + 6RAM 2 4 No
78a 5 128 16 + 16F 128 8 V/H switchable No
78b 3 128 16 + 16F 128 8 1 No
79 2 64 32 64 8 V/H hardwired No No
86 3+speech 128 32 64 8 V/H hardwired Impossible No
87 2 32 32 8 V/H hardwired Impossible No
92 5+speech 256 16F + 16 128 8 V/H hardwired No
96 3 128 32 32RAM 16 V/H hardwired No
140 3 128 32 128 8 V/H hardwired Impossible No
152 3 128 16 + 16F 128 8 1 No
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