UNIF/FARID SLROM 8-IN-1: Difference between revisions

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m (PRG RAM protection is a single bit in a register, pedantically maybe not a register all on its own)
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On both warm and cold boot, this register is cleared.
On both warm and cold boot, this register is cleared.


Note that the [[MMC1#PRG bank .28internal.2C .24E000-.24FFFF.29|MMC1's PRG RAM protection register]] may need to be cleared in order to write here. Also note that unlike the rest of the MMC1, all bits are written at the same time.
Note that the [[MMC1#PRG bank .28internal.2C .24E000-.24FFFF.29|MMC1's PRG RAM protection bit]] may need to be cleared in order to write here. Also note that unlike the rest of the MMC1, all bits are written at the same time.


See also:
See also:
* http://forums.nesdev.org/viewtopic.php?t=10632
* http://forums.nesdev.org/viewtopic.php?t=10632

Revision as of 04:08, 4 June 2016

UNIF MAPR FARID_SLROM_8-IN-1 (note underscores) describes a multicart designed by Farid in 2013. It contains eight 128+128 KiB SLROM games.

It replaces the MMC1's normal PRG RAM with a single register:

$6000-$7FFF: [.BBB K...]
               ||| |
               ||| +---- 1: disallow any subsequent writes
               +++------ Select outer bank for both PRG and CHR
                         (i.e. connected to PRG and CHR A17, A18, and A19)

On both warm and cold boot, this register is cleared.

Note that the MMC1's PRG RAM protection bit may need to be cleared in order to write here. Also note that unlike the rest of the MMC1, all bits are written at the same time.

See also: