Status flags: Difference between revisions

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(2A03 has no decimal mode)
m (the decimal bit *exists* it just does almost nothing)
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Bit 5: Always set<br>
Bit 5: Always set<br>
Bit 4: Clear if interrupt vectoring, set if BRK or PHP<br>
Bit 4: Clear if interrupt vectoring, set if BRK or PHP<br>
Bit 3: Decimal mode (not available on the NES's 2A03/2A07)<br>
Bit 3: Decimal mode (extant but not functional on the NES's 2A03/2A07)<br>
Bit 2: Interrupt disable<br>
Bit 2: Interrupt disable<br>
Bit 1: Zero<br>
Bit 1: Zero<br>

Revision as of 16:58, 22 March 2011

The 6502 has 6 status flags: carry, decimal mode, interrupt disable, negative, overflow, and zero. Each of these can either be set or clear. The processor stores the current state of each at all times. There are 2^6 = 64 total states these flags can be in.

During certain events, a copy of the flags is written to a byte in memory. There are 8 bits in a byte, and when writing to memory, all 8 bits must be written. Since there are only 6 status flags, the unused 2 bits must be given values.

There are four events that cause the flags to be written to memory: NMI and IRQ vectoring, and the BRK and PHP instructions. Rather than set the unused bits in the copy in memory to the same values in all cases, the 6502 sets one of them based on whether the event was interrupt vectoring or an executed instruction.

The flags are copied to memory in this arrangement:

Bit 7: Negative
Bit 6: Overflow
Bit 5: Always set
Bit 4: Clear if interrupt vectoring, set if BRK or PHP
Bit 3: Decimal mode (extant but not functional on the NES's 2A03/2A07)
Bit 2: Interrupt disable
Bit 1: Zero
Bit 0: Carry

Note bits 4 and 5. This means that the following will put $30 into A, not 0:

LDA #$00
PHA      ; pushes $00 on stack
PLP      ; clears all 6 status flags
PHP      ; pushes $30 on stack
PLA      ; pops the $30 off the stack

Since bit 4 is set if the cause was a BRK instruction, and clear if it was an IRQ, this allows code to determine the cause of its IRQ handler being invoked, since BRK and IRQ both use the vector at $FFFE:

irq:
        STA temp
        PLA        ; get saved flags off stack
        PHA        ; save again
        AND #$10   ; check bit 4
        BNE caused_by_brk
caused_by_irq:
        ...
caused_by_brk:
        ....

The above is the only way to determine the cause of the irq handler invocation. One might think that the following would work, if one thought that there was a status flag that told when it was a BRK instruction that invoked the IRQ handler:

; wrong way to determine cause of IRQ handler invocation
irq:
        STA temp
        PHP        ; save current flags
        PLA        ; get saved flags off stack
        AND #$10   ; check bit 4
        BNE caused_by_brk
caused_by_irq:
        ...
caused_by_brk:
        ....

This fails because there are only 6 status flags, none of which tell the reason the IRQ handler was invoked. This misunderstanding exists because many descriptions of the 6502 incorrectly state that the processor has 7 status flags, the 7th one being the break flag.

There is no break flag; there are only 6 status flags. As covered above, there are 8 bits in a byte, so when saving a copy of the status flags in memory, these unused two bits must be set to something. On the 6502, bit 5 of the copy is always set, and bit 4 is set BRK or PHP, clear if an interrupt. When restoring the flags from memory, bits 4 and 5 are ignored, since again, there are only 6 status flags, and thus the extra 2 bits of the byte must be ignored.

See also