INES Mapper 038: Difference between revisions
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[[Category:GNROM-like mappers]][[Category:iNES Mappers | [[Category:GNROM-like mappers|038]][[Category:iNES Mappers|038]][[Category:in NesCartDB|038]] | ||
[[iNES Mapper 038]] represents the board used for Crime Busters. It is another mapper | [[iNES Mapper 038]] represents the board used for Crime Busters. It is another mapper almost identical to [[GxROM|GNROM]] ([[iNES Mapper 066|66]]) except the bits and writeable port moved around. | ||
== Overview == | |||
* PRG ROM size: 128 KiB | |||
* PRG ROM bank size: 32 KiB | |||
* PRG RAM: Impossible | |||
* CHR capacity: 32 KiB ROM | |||
* CHR bank size: 8 KiB | |||
* Nametable mirroring: Hardwired vertical mirroring | |||
* Subject to [[bus conflict]]s: no | |||
== Registers == | |||
=== Bank Select ($7000-$7FFF) === | |||
7 bit 0 | |||
---- ---- | |||
xxxx CCPP | |||
|||| | |||
||++- Select 32 KB PRG ROM bank for CPU $8000-$FFFF | |||
++--- Select 8 KB CHR ROM bank for PPU $0000-$1FFF | |||
Emulator oversize support | == Hardware == | ||
Writes to $F000-$FFFF are very likely to also trigger a bankswitch, but well behaved code has no reason to. The [[74138]] used by this board uses /ROMSEL and R/W on its enable inputs, but /ROMSEL is 1 while M2 is low, not just while M2 is high and and A15 is low. As a result, before M2 is high, if the 2A03's A14, A13, and A12 lines are 1 and R/W is 0, the [[74161]]'s /LOAD line will still load from the data bus. | |||
== Emulator oversize support == | |||
FCEUX (2.1.5): | FCEUX (2.1.5): | ||
$7000-$7FFF: [CCCC CCPP] | $7000-$7FFF: [CCCC CCPP] |
Revision as of 21:46, 27 July 2012
iNES Mapper 038 represents the board used for Crime Busters. It is another mapper almost identical to GNROM (66) except the bits and writeable port moved around.
Overview
- PRG ROM size: 128 KiB
- PRG ROM bank size: 32 KiB
- PRG RAM: Impossible
- CHR capacity: 32 KiB ROM
- CHR bank size: 8 KiB
- Nametable mirroring: Hardwired vertical mirroring
- Subject to bus conflicts: no
Registers
Bank Select ($7000-$7FFF)
7 bit 0 ---- ---- xxxx CCPP |||| ||++- Select 32 KB PRG ROM bank for CPU $8000-$FFFF ++--- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
Hardware
Writes to $F000-$FFFF are very likely to also trigger a bankswitch, but well behaved code has no reason to. The 74138 used by this board uses /ROMSEL and R/W on its enable inputs, but /ROMSEL is 1 while M2 is low, not just while M2 is high and and A15 is low. As a result, before M2 is high, if the 2A03's A14, A13, and A12 lines are 1 and R/W is 0, the 74161's /LOAD line will still load from the data bus.
Emulator oversize support
FCEUX (2.1.5): $7000-$7FFF: [CCCC CCPP] Nestopia (1.4.0h): $6000-$7FFF: [CCCC CC..] [PPPP PPPP]