User:Myask/Universal Mapper Description Language: Difference between revisions

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=Details=
Been thinking about making some better way to talk about mappers, as described [http://forums.nesdev.org/viewtopic.php?p=74174#p74174 in this post] among several other places on our boards.
Parts/functions
Parts/functions
* Define state bits
* Define state bits
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   prgrom prg(32KiB);  
   prgrom prg(32KiB);  
   //could also write 256Kib..but seems like a source of many typo problems
   //could also write 256Kib..but seems like a source of many typo problems
  //perhaps go by address line, data line counts?
   chrrom chr(8KiB);
   chrrom chr(8KiB);
   //only difference between PRG and CHR def'ns are its default connections
   //only difference between PRG and CHR def'ns are its default connections
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  //connections: PRG
  //connections: PRG
   connect prg.a[14:0] CPU_A[14:0];
   connect prg.a[14:0] CPU_A[14:0];
  //NROM_128: connect prg.a[13:0] CPU_A[13:0];
  //and connect prg.a[14] VCC; //several ways to do it, really.
   connect prg.d[7:0] CPU_D[7:0];
   connect prg.d[7:0] CPU_D[7:0];
   connect prg.oe_n prg.ce_n ROMSEL_n;
   connect prg.oe_n prg.ce_n ROMSEL_n; //I suspect I've got these mildly wrong
  //connections: CHR
  //connections: CHR
   connect chr.a[12:0] PPU_A[12:0];
   connect chr.a[12:0] PPU_A[12:0];

Revision as of 21:24, 15 July 2016

Details

Been thinking about making some better way to talk about mappers, as described in this post among several other places on our boards. Parts/functions

  • Define state bits
    • include easy ROM/RAM chip(/internal) declaration; don't want to exclude MagicFloor nor MMC5/6 from "correct" description
  • Logic
  • Arbitrary address bus size for chips?

Convenience addtions

  • Conditional operations (optional but helps user-side…but makes it harder program-side)
    • some header fields as parameters might be desirable (mirroring, chip sizes)
    • on the other hand, they are different boards in some manner. Perhaps only as solder-pad options?
  • Cartridge connector pins as predefined signal names, or a module (to allow picking 60 or 72-pin)
  • Option to autoconnect power, ground, address lines that are not in file
    • like connecting PPU_A[0:7] to CHR_ROM_A[0:7] if CHR_ROM_A[0:7] do not appear in the description)
    • Also autoconnect CIC

Extra function thoughts

  • Outputs (e.g. LED)
  • Inputs (e.g. DIPswitch, solder pads)
  • Describing expansion port devices in similar manner
  • Describing controller port devices in similar manner

Hard Part

  • Expansion audio (analog, can involve extra oscillators as VRC7 audio does)

NROM-256 example

mapper NROM_256V begin
 //without autofills
//component section
 prgrom prg(32KiB); 
 //could also write 256Kib..but seems like a source of many typo problems
 //perhaps go by address line, data line counts?
 chrrom chr(8KiB);
 //only difference between PRG and CHR def'ns are its default connections
 //and outputs
 CIC cic(NES);//allow other chips I guess?

//dynamic components section
 solder h to connect CIRAM_A10 to PPU_A[10];
 solder v to connect CIRAM_A10 to PPU_A[11]; 
 init h iNES.6[0];
 init v ~iNES.6[0];
  //technically redundant per wiki as only V-using boards had solder pads?
  //make "to" as whitespace, allowing nice codelook but not requiring 
 connect CIRAM_CE_n to PPU_A13_n;

//connections: power
 connect VCC prg.vcc cic.vcc chr.vcc;
 connect GND prg.gnd cic.gnd chr.gnd;
  //allow multiple connections per statement
  //considering a shortform lke "=" for connect
//connections: CIC 
 //[omitted]
//connections: PRG
 connect prg.a[14:0] CPU_A[14:0];
 //NROM_128: connect prg.a[13:0] CPU_A[13:0];
 //and connect prg.a[14] VCC; //several ways to do it, really.
 connect prg.d[7:0] CPU_D[7:0];
 connect prg.oe_n prg.ce_n ROMSEL_n; //I suspect I've got these mildly wrong
//connections: CHR
 connect chr.a[12:0] PPU_A[12:0];
 connect chr.d[7:0] PPU_D[7:0];
 connect chr.oe_n chr.ce_n PPU_A[13];

end NROM_256V;