Talk:Visual circuit tutorial: Difference between revisions
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It might be possible to make "in NMOS, transistors are placed in a substrate of n-doped semiconductor" clearer. Does "transistor" here refer to the entire diffusion + poly combo (so that diffusion + poly together are placed on the substrate), or does the n-doped semiconductor make up (or interact with) some particular part of the transistor (like the diffusion, or the polysilicon)? -[[User:Ulfalizer|Ulfalizer]] ([[User talk:Ulfalizer|talk]]) 23:43, 27 May 2013 (MDT) | It might be possible to make "in NMOS, transistors are placed in a substrate of n-doped semiconductor" clearer. Does "transistor" here refer to the entire diffusion + poly combo (so that diffusion + poly together are placed on the substrate), or does the n-doped semiconductor make up (or interact with) some particular part of the transistor (like the diffusion, or the polysilicon)? -[[User:Ulfalizer|Ulfalizer]] ([[User talk:Ulfalizer|talk]]) 23:43, 27 May 2013 (MDT) | ||
: I misremembered about the substrate; it's a lightly p-doped substrate, vis [[wikipedia:File:CMOS fabrication process.svg]]. So I fixed that. The transistor is the sum of all its parts: the substrate (or "body"), both the source and drain N-doped diffusion, the layer of quartz insulator beneath the gate and the layer of polysilicon that is the gate. Arguably it's also the metal or polysilicon vias to the source and drain. Also [[wikipedia:File:CMOS NAND Layout.svg]]. Because the gate is placed before the diffusion, the region immediately under the gate is actually not very doped— hence "substrate". —[[User:Lidnariq|Lidnariq]] ([[User talk:Lidnariq|talk]]) 00:51, 28 May 2013 (MDT) | : I misremembered about the substrate; it's a lightly p-doped substrate, vis [[wikipedia:File:CMOS fabrication process.svg]]. So I fixed that. The transistor is the sum of all its parts: the substrate (or "body"), both the source and drain N-doped diffusion, the layer of quartz insulator beneath the gate and the layer of polysilicon that is the gate. Arguably it's also the metal or polysilicon vias to the source and drain. Also [[wikipedia:File:CMOS NAND Layout.svg]]. Because the gate is placed before the diffusion, the region immediately under the gate is actually not very doped— hence "substrate". —[[User:Lidnariq|Lidnariq]] ([[User talk:Lidnariq|talk]]) 00:51, 28 May 2013 (MDT) | ||
:: I'm happy with the current description then. Gives the general idea without lying or getting bogged down in details (which might be overkill for someone needing to look up "NMOS" in an article like this). -[[User:Ulfalizer|Ulfalizer]] ([[User talk:Ulfalizer|talk]]) 01:03, 28 May 2013 (MDT) | |||
Revision as of 07:03, 28 May 2013
Cross-coupled inverter
Is that actually an S-R latch? vis. http://en.wikipedia.org/wiki/File:R-S_mk2.gif —Lidnariq (talk) 12:46, 24 May 2013 (MDT)
Some possible NMOS clarifications
It might be possible to make "in NMOS, transistors are placed in a substrate of n-doped semiconductor" clearer. Does "transistor" here refer to the entire diffusion + poly combo (so that diffusion + poly together are placed on the substrate), or does the n-doped semiconductor make up (or interact with) some particular part of the transistor (like the diffusion, or the polysilicon)? -Ulfalizer (talk) 23:43, 27 May 2013 (MDT)
- I misremembered about the substrate; it's a lightly p-doped substrate, vis wikipedia:File:CMOS fabrication process.svg. So I fixed that. The transistor is the sum of all its parts: the substrate (or "body"), both the source and drain N-doped diffusion, the layer of quartz insulator beneath the gate and the layer of polysilicon that is the gate. Arguably it's also the metal or polysilicon vias to the source and drain. Also wikipedia:File:CMOS NAND Layout.svg. Because the gate is placed before the diffusion, the region immediately under the gate is actually not very doped— hence "substrate". —Lidnariq (talk) 00:51, 28 May 2013 (MDT)
