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| '''TGROM''' (NES-TGROM and HVC-TGROM) is a common board within the [[TxROM]] set. Like other TxROM boards, TGROM uses the [[MMC3|Nintendo MMC3]] ASIC.
| | #REDIRECT [[TxROM]] |
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| == Overview ==
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| * PRG ROM size: 128, 256 or 512 KB
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| * PRG ROM bank size: 8 KB
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| * PRG RAM: None
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| * CHR capacity: 8 KB RAM
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| * CHR bank size: 1 KB and 2 KB
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| * Nametable [[mirroring]]: Controlled by mapper
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| * Subject to [[bus conflict]]s: No
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| == Banks ==
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| * CPU $8000-$9FFF (or $C000-$DFFF): 8 KB switchable PRG ROM bank
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| * CPU $A000-$BFFF: 8 KB switchable PRG ROM bank
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| * CPU $C000-$DFFF (or $8000-$9FFF): 8 KB PRG ROM bank, fixed to the second-last bank
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| * CPU $E000-$FFFF: 8 KB PRG ROM bank, fixed to the last bank
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| * PPU $0000-$07FF (or $1000-$17FF): 2 KB switchable CHR RAM bank
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| * PPU $0800-$0FFF (or $1800-$1FFF): 2 KB switchable CHR RAM bank
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| * PPU $1000-$13FF (or $0000-$03FF): 1 KB switchable CHR RAM bank
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| * PPU $1400-$17FF (or $0400-$07FF): 1 KB switchable CHR RAM bank
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| * PPU $1800-$1BFF (or $0800-$0BFF): 1 KB switchable CHR RAM bank
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| * PPU $1C00-$1FFF (or $0C00-$0FFF): 1 KB switchable CHR RAM bank
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| == Chips and pinouts ==
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| * PRG ROM - 2 MBits (256 kB x 8) (DIP-32)
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| ---_---
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| A17 - |01 32| - +5V
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| /CE - |02 31| - +5V
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| A15 - |03 30| - +5V
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| A12 - |04 29| - A14
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| A7 - |05 28| - A13
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| A6 - |06 27| - A8
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| A5 - |07 26| - A9
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| A4 - |08 25| - A11
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| A3 - |09 24| - A16
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| A2 - |10 23| - A10
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| A1 - |11 22| - /CE
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| A0 - |12 21| - D7
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| D0 - |13 20| - D6
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| D1 - |14 19| - D5
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| D2 - |15 18| - D4
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| GND - |16 17| - D3
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| -------
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| PRG ROMs of 1 MBit (128 kB x 8) comes in a DIP-28 packages are sit 2 rows back (only pins 3 to 30 are used).
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| This pinout is not compatible with stantard 27C020 EPROMs, nor with standard 27C010 EPROMs, so to insert them in the board manual rewiring is needed.
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| * CHR RAM - 64 KBits (8 KB x 8) : Standard [[6264_static_ram|6264]] pinout.
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| * [[MMC3_pinout|MMC3 pinout]]
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| == See also ==
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| *[[MMC3|Nintendo MMC3]]
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