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| '''SGROM''' (NES-SGROM and HVC-SGROM) is a common board within the [[SxROM]] set. Like other SxROM boards, SGROM uses the [[MMC1|Nintendo MMC1]] ASIC.
| | #REDIRECT [[SxROM]] |
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| == Overview ==
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| * PRG ROM size: 128 or 256 KB
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| * PRG ROM bank size: 16 KB or 32 KB
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| * PRG RAM: None
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| * CHR capacity: 8 KB RAM
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| * CHR bank size: 8 KB or 4 KB
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| * Nametable [[mirroring]]: Controlled by mapper
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| * Subject to [[bus conflict]]s: No
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| == Banks ==
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| * CPU $8000-$BFFF: 16 KB PRG ROM bank, either switchable or fixed to the first bank
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| * CPU $C000-$FFFF: 16 KB PRG ROM bank, either fixed to the last bank or switchable
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| * PPU $0000-$0FFF: 4 KB switchable CHR RAM bank
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| * PPU $1000-$1FFF: 4 KB switchable CHR RAM bank
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| == Chips and pinouts ==
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| * PRG ROM - 2 MBits (256 kB x 8) (DIP-32)
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| ---_---
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| A17 - |01 32| - +5V
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| /CE - |02 31| - +5V
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| A15 - |03 30| - +5V
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| A12 - |04 29| - A14
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| A7 - |05 28| - A13
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| A6 - |06 27| - A8
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| A5 - |07 26| - A9
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| A4 - |08 25| - A11
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| A3 - |09 24| - A16
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| A2 - |10 23| - A10
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| A1 - |11 22| - /CE
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| A0 - |12 21| - D7
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| D0 - |13 20| - D6
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| D1 - |14 19| - D5
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| D2 - |15 18| - D4
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| GND - |16 17| - D3
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| -------
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| PRG ROMs of 1 MBit (128 kB x 8) comes in a DIP-28 packages are sit 2 rows back (only pins 3 to 30 are used).
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| This pinout is not compatible with stantard 27C020 EPROMs, nor with standard 27C010 EPROMs, so to insert them in the board manual rewiring is needed.
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| * CHR RAM - 64 KBits (8 KB x 8) : Standard [[6264_static_ram|6264]] pinout.
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| * [[MMC1_pinout|MMC1 pinout]]
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| == See also ==
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| *[[MMC1|Nintendo MMC1]]
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