INES Mapper 163: Difference between revisions

From NESdev Wiki
Jump to navigationJump to search
 
(7 intermediate revisions by the same user not shown)
Line 1: Line 1:
{{DEFAULTSORT:163}}[[Category:iNES Mappers]][[Category:Mappers using $4020-$5FFF]][[Category:Mappers with CHR RAM]]
{{DEFAULTSORT:163}}[[Category:iNES Mappers]][[Category:Mappers using $4020-$5FFF]][[Category:Mappers with CHR RAM]]
'''iNES Mappers 162''' and '''163''' denote two very similar circuit boards from 外星 (Wàixīng) and 南晶 (Nánjīng) that differ only in the way that the microwave interface is connected.
'''iNES Mapper 162''' denotes the 外星 (Wàixīng) '''FS304''' circuit board, used for the following games:
* ''Mummy - 神鬼传奇''
* ''Zelda 传说: 三神之力'' (ES-1096)
* ''法老王 - Pharaoh''
* ''火焰纹章 - 圣战的系谱'' and its title screen hack ''聖火徽章 III'' (Shènghuǒ Huīzhāng III/Fire Emblem III)
* ''西游记后传'' (ES-1097)
A compatible circuit board with an unknown PCB code is used for a few games from 南晶 (Nánjīng):
* ''梁山英雄'' (Liángshān Yīngxióng, NJ023, title screen hack of 水浒神兽, NJ019)
* ''农场小精灵'' (Nóngchǎng Xiǎojīnglíng, NJ025, title screen hack of 牧场物语 - Harvest Moon, NJ011)
'''iNES Mapper 163''' denotes the 南晶 (Nánjīng) '''FC-001''' circuit board, used on most of their games, including:
'''iNES Mapper 163''' denotes the 南晶 (Nánjīng) '''FC-001''' circuit board, used on most of their games, including:
* ''牧场物语 - Harvest Moon'' (NJ011)
* ''牧场物语 - Harvest Moon'' (NJ011)
Line 26: Line 15:
=Registers=
=Registers=
All registers are initialized to $00 on reset.
All registers are initialized to $00 on reset.
==PRG-ROM Bank Low/CHR-RAM Switch ($5000, write)==
==PRG Bank Low/CHR-RAM Switch ($5000, write)==
  Mask: $FF00
  Mask: $FF00
   
   
Line 37: Line 26:
               1: CHR A12=PPU A9 latched on last rise of PPU A13 (enable auto-switch)
               1: CHR A12=PPU A9 latched on last rise of PPU A13 (enable auto-switch)


* Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position.
* Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position. This auto-switch behavior is similar to that of [[iNES Mapper 096|mapper 96]].
* Note that if $5300.0 is 1, the two lowest bits are swapped during writing.
* Bits 0 and 1 are subject to the [[#Mode ($5300, write)|Mode register]].
* Changing the value of $5300.0 without writing to $5000 afterwards does not change the latched bits.
* On '''iNES Mapper 162''', the actual PRG A15 is the bit coming from this register is OR'd with ASIC pin #4 set by register $5100.
* The auto-switch behavior is similar to that of [[iNES Mapper 096|mapper 96]]


==Microwire Interface ($5100, write)==
==PRG Bank High ($5200, write)==
  Mask: $FF00
  Mask: $FF00
   
   
  D~7654 3210
  D~7654 3210
   ---------
   ---------
   .... .ABC
   .... ..PP
        ||+- ASIC pin #1 output if $5100.0=0, ASIC pin #4 output if $5100.0=1
          ++- PRG A20..A19
        |+-- ASIC pin #4 output if $5100.0=0, ASIC pin #1 output if $5100.0=1
* Bits 0 and 1 are subject to the [[#Mode ($5300, write)|Mode register]]. 1 MiB games connect both ASIC PRG A19 and A20 outputs to ROM A19, effectively exempting this register from the bit-swap.
        +--- ASIC pin #31, see below


The microwire interface is normally connected to serial EEPROM on other mappers using a similar chipset. On '''iNES Mapper 162''':
==Feedback Write ($5100-$5101, write)==
* PRG A15 is the OR of $5000 and the latched output of ASIC pin #4 set by this register;
Mask: $FF01
* ASIC pin #31's output is latched as written.
On '''iNES Mapper 163''':
D~7654 3210  A~FEDC BA98 7654 3210
* if A0=0 during writing to $51xx, the ''inverted'' output of ASIC pin #31 is latched from bit 2,
  ---------    -------------------
* if A0=1 during writing to $51xx, the previously-latched output of ASIC pin #31 is inverted if ASIC pin #1 changes from 1 to 0, and bit 2 is ignored.
  .... .F.E    .... .... .... ...A
Note that if $5300.0 is 1, there are ''two'' effects on this register:
        | |                      +- Action on write
* the two lowest bits are swapped ''during writing'' before being latched;
        | +- A=0: Value latched
* the two latched bits are swapped before being output ''as long as'' $5300.0 remains 1.
        |    A=1: Value latched, and flip the latched F bit on falling edges of E (i.e. 1->0).
These two effects ''counteract'' each other, so that register $5100 effectively operates ''identically'' regardless of the $5300.0 value. When writing to $5300 and changing its bit 0 ''without'' writing to $5100 afterwards, ...
        +--- A=0: Value latched
* the latched values of B and C remain as when they were written, but
              A=1: Ignored, previously-latched value either kept or flipped
* the choice of which latched bit to be output to pin #1 and #4 changes;
 
or in other words, pins #1 and #4 swap their values until $5100 is written to again. This behavior is relevant for the two mapper 162 Nánjīng games.
* Bit 0 is subject to the [[#Mode ($5300, write)|Mode register]].
==PRG-ROM Bank High ($5200, write)==
==Feedback Read ($5500-$5501, read)==
  Mask: $FF00
  Mask: $F300
   
   
  D~7654 3210
  D~7654 3210
   ---------
   ---------
   .... ..PP
   .... .F..
          ++- PRG A20..A19
        +--- Inverted value of latched F bit
* Note that if $5300.0 is 1, the two lowest bits are swapped during writing.
 
* Games with 1 MiB PRG-ROM that set $5300.0=1 still use bit 0 to denote PRG A19; they must connect both ASIC PRG A19 and A20 outputs to the ROM chip's A19 pin.
* ''暗黑破坏神 - Diablo'' (Ànhēi Pòhuàishén, NJ037) only checks that F is read back inverted.
* ''轩辕剑外传 之 天之痕''  (Xuānyuánjiàn Wàizhuàn zhī Tiān zhī Hén, NJ045) checks that F is flipped on falling edges of E.
 
==Mode ($5300, write)==
==Mode ($5300, write)==
  Mask: $FF00
  Mask: $FF00
Line 81: Line 68:
   ---------
   ---------
   .... .A?B
   .... .A?B
         | +- 0: Leave D0,D1 unmodified on register writes to $5000-$5200.
         | +- 0: Do not swap D0,D1 on writes to $5000-$5200.
         |    1: Swap D0,D1 on all register writes to $5000-$5200.
         |    1: Swap D0,D1 on writes to $5000-$5200.
         +--- 0: PRG A15/A16=1
         +--- 0: PRG A15/A16=11b
               1: PRG A15/A16 from $5000
               1: PRG A15/A16 from $5000


* Writes to this register are ''not'' subject to D0/D1 bit-swapping, i.e. the register is not affected by its own bit 0.
* This register is not subject to bit-swapping, i.e. the register is not affected by its own bit 0.
* Because this register is initialized to $00 on reset, thus clearing bit 2 which causes PRG A15/A16 to be held high, the game will boot in 32 KiB PRG-ROM bank #3.
* Because reset clears the A bit, games will boot in 32 KiB PRG-ROM bank #3.
==Microwire Interface ($5100/$5500, read)==
Mask: $FF00
D~7654 3210
  ---------
  .... .A..
        |
        |
        +--- ASIC pin #31 input
Bit 2 reads back the current state of pin #31.
=Notes=
=Notes=
* Setting $5300.0=1 will effectively swap PRG A15/A16 and PRG A19/A20. Cartridges using this mapper must be dumped with $5300=$04 during dumping, even if the games run with $5300=$07. Otherwise, PRG A15/A16 and PRG A19/A20 would be swapped both during dumping and emulation, negating the effect; such images will therefore not work with an accurate emulation of this mapper.
* Mapper 163 cartridges should be dumped with $5300=$04 to obtain the correct PRG bank order. To verify that the cartridge is really mapper 163 ...
* ''暗黑破坏神 - Diablo'' (NJ037) and its title screen hack ''毁灭之神'' (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware.
** ... rule out [[INES Mapper 162]] by writing $04 to $5300 and verifying that $5100.1 does not change the PRG bank;
* ''魔兽世界: 恶魔猎人'' (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.
** ... rule out [[NES 2.0 Mapper 558]] by verifying that $5000 value $01 does not result in a different PRG bank between $5300 values $04 and $05 (because the B bit is bit 1 in mapper 558).
* ''暗黑破坏神 - Diablo'' (NJ037) and its title screen hack ''毁灭之神'' (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware. ''魔兽世界: 恶魔猎人'' (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.
=See also=
=See also=
* [[INES Mapper 164]] is an earlier implementation without D0/D1 swapping, swaps the meaning of registers $5100 and $5200, has optional UxROM-like bankswitching, and a 1 bpp CHR mode.
* Similar mappers: [[INES Mapper 162]], [[INES Mapper 164]], [[NES 2.0 Mapper 558]]
* [[NES 2.0 Mapper 558]] swaps the meaning of registers $5100 and $5200, and connects the microwire interface to EEPROM.

Latest revision as of 20:26, 17 May 2021

iNES Mapper 163 denotes the 南晶 (Nánjīng) FC-001 circuit board, used on most of their games, including:

  • 牧场物语 - Harvest Moon (NJ011)
  • 水浒神兽 (Shuǐhǔ Shénshòu, NJ019)
  • 暗黑破坏神 - Diablo (NJ037)
  • 轩辕剑外传 之 天之痕 (Xuānyuánjiàn Wàizhuàn zhī Tiānzhīhén, NJ045)
  • Final Fantasy IV - 最终幻想 4꞉ 光与暗 水晶纷争 (NJ098)

Banks

  • CPU $6000-$7FFF: 8 KiB unbanked PRG-RAM, battery-backed
  • CPU $8000-$FFFF: 32 KiB switchable PRG-ROM bank
  • PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM bank, 4 KiB can be automatically switched
  • Nametable mirroring: hard-wired

Registers

All registers are initialized to $00 on reset.

PRG Bank Low/CHR-RAM Switch ($5000, write)

Mask: $FF00

D~7654 3210
  ---------
  C... PPPP
  |    ++++- PRG A18..A15
  +--------- Automatic 4 KiB CHR-RAM switch: when PPU A13=0 (pattern table) ...
              0: CHR A12=PPU A12 (disable auto-switch)
              1: CHR A12=PPU A9 latched on last rise of PPU A13 (enable auto-switch)
  • Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position. This auto-switch behavior is similar to that of mapper 96.
  • Bits 0 and 1 are subject to the Mode register.

PRG Bank High ($5200, write)

Mask: $FF00

D~7654 3210
  ---------
  .... ..PP
         ++- PRG A20..A19
  • Bits 0 and 1 are subject to the Mode register. 1 MiB games connect both ASIC PRG A19 and A20 outputs to ROM A19, effectively exempting this register from the bit-swap.

Feedback Write ($5100-$5101, write)

Mask: $FF01

D~7654 3210  A~FEDC BA98 7654 3210
  ---------    -------------------
  .... .F.E    .... .... .... ...A
        | |                      +- Action on write
        | +- A=0: Value latched
        |    A=1: Value latched, and flip the latched F bit on falling edges of E (i.e. 1->0).
        +--- A=0: Value latched
             A=1: Ignored, previously-latched value either kept or flipped

Feedback Read ($5500-$5501, read)

Mask: $F300

D~7654 3210
  ---------
  .... .F..
        +--- Inverted value of latched F bit
  • 暗黑破坏神 - Diablo (Ànhēi Pòhuàishén, NJ037) only checks that F is read back inverted.
  • 轩辕剑外传 之 天之痕 (Xuānyuánjiàn Wàizhuàn zhī Tiān zhī Hén, NJ045) checks that F is flipped on falling edges of E.

Mode ($5300, write)

Mask: $FF00

D~7654 3210
  ---------
  .... .A?B
        | +- 0: Do not swap D0,D1 on writes to $5000-$5200.
        |    1: Swap D0,D1 on writes to $5000-$5200.
        +--- 0: PRG A15/A16=11b
             1: PRG A15/A16 from $5000
  • This register is not subject to bit-swapping, i.e. the register is not affected by its own bit 0.
  • Because reset clears the A bit, games will boot in 32 KiB PRG-ROM bank #3.

Notes

  • Mapper 163 cartridges should be dumped with $5300=$04 to obtain the correct PRG bank order. To verify that the cartridge is really mapper 163 ...
    • ... rule out INES Mapper 162 by writing $04 to $5300 and verifying that $5100.1 does not change the PRG bank;
    • ... rule out NES 2.0 Mapper 558 by verifying that $5000 value $01 does not result in a different PRG bank between $5300 values $04 and $05 (because the B bit is bit 1 in mapper 558).
  • 暗黑破坏神 - Diablo (NJ037) and its title screen hack 毁灭之神 (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware. 魔兽世界: 恶魔猎人 (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.

See also

Retrieved from "https://www.nesdev.org/w/index.php?title=INES_Mapper_163&oldid=5202"