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| The generic designation '''SxROM''' refers to cartridge boards made by Nintendo that use the [[MMC1|Nintendo MMC1]] mapper.
| | #REDIRECT [[MMC1]] |
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| The following SxROM boards are known to exist:
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| {| Border="1"
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| ! Board || PRG ROM || PRG RAM || CHR
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| |-
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| |SAROM || 64 KB || 8 KB || 16,32,64 KB ROM
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| |-
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| |SBROM || 64 KB || || 16,32,64 KB ROM
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| |-
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| |SCROM || 64 KB || || 128 KB ROM
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| |-
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| |SEROM || 32 KB || || 16,32,64 KB ROM
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| |-
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| |SFROM || 128,256 KB || || 16,32,64 KB ROM
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| |-
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| |SGROM || 128,256 KB || || 8 KB RAM
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| |-
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| |SHROM || 32 KB || || 128 KB ROM
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| |-
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| |SJROM || 128,256 KB || 8 KB || 16,32,64 KB ROM
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| |-
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| |SKROM || 128,256 KB || 8 KB || 128 KB ROM
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| |-
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| |SLROM || 128,256 KB || || 128 KB ROM
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| |-
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| |SL1ROM || 64,128,256 KB || || 128 KB ROM
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| |-
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| |SL2ROM
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| |-
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| |SL3ROM
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| |-
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| |SLRROM
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| |SMROM || 256 KB || || 8 KB RAM ||
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| |-
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| |SNROM || 128,256 KB || 8 KB || 8 KB RAM
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| |-
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| |SOROM || 128,256 KB || 16 KB || 8 KB RAM
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| |-
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| |SUROM || 512 KB || 8 KB || 8 KB RAM
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| |-
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| |SXROM || 128,256,512 KB || 32 KB || 8 KB RAM
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| |}
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| == Solder pad config ==
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| === Battery data retention (SAROM, SJROM, SKROM, SNROM, SUROM, SXROM only) ===
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| * PRG RAM retaining data : 'SL' disconnected, Battery, D1, D2, R1 R2 and R3 present.
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| * PRG RAM not retaining data : 'SL' connected, leave slots for Battery, D1, D2, R1, R2 and R3 free.
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| Even if the SOROM boards utilizes a battery, it is connected to only one PRG RAM chip. The first RAM chip will not retain its data, but the second one will.
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| == Higher CHR lines ==
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| The SUROM, SOROM, and SXROM boards are extensions of SNROM, which has CHR RAM and PRG RAM.
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| Because CHR RAM doesn't need bankswitching, these boards use the CHR bank select lines to switch different things:
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| *SUROM uses the upper CHR bank select line coming out of the mapper to control the upper address line of its 512KB PRG ROM.
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| *SOROM uses a similar method, using the second-highest CHR bank select line to choose between two 8KB PRG RAM chips. Of chip 0 and chip 1, only chip 1 is battery backed.
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| *SXROM is a combination of SOROM and SUROM, addressing both 512KB of PRG ROM and 32KB of PRG RAM.
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| In these scenarios, however, both CHR bank registers must be set to the same value (or the CHR bank size must be set to 8KB), or the PRG ROM/RAM will be bankswitched as the PPU renders, causing disastrous results.
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| == Various notes ==
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| * SLxROM boards are functionally identical to SLROM, but with different chip pinouts. Some of them have an additional [[74HC32]] chip to combine PPU /RD and PPU /A13 into a single enable signal for the CHR-ROM chip that has only 28 pins.
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| * SMROM is functionally identical to SGROM, but features two 128 KB PRG ROM chips instead of one 256 KB. Only a very early MMC1 game in japan is known to have used this board, and it is the only known Nintendo-made board which combines smaller ROM chips to get a bigger ROM.
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| * Even boards which different usage of upper CHR lines are all assigned to [[INES Mapper 001]]. Emulators can distinguish SOROM and SXROM from SNROM using the new PRG RAM size fields in [[NES 2.0]] or using a PRG hash for legacy iNES ROMs. Therefore, it is recommended that ROM images of SOROM and SXROM games be stored in NES 2.0 format to allow an emulator to distinguish them from SNROM or SUROM.
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