Sunsoft FME-7: Difference between revisions

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[[Category:ASIC mappers]][[Category:in NesCartDB]]
{{Infobox iNES mapper
The [[Sunsoft FME-7]] represents two mapper ICs which work identically, except that one contains extra sound hardware. The FME-7 is the base memory mapper with no additional sound hardware. The Sunsoft 5B is an FME-7 with the addition of [[Sunsoft 5B audio|extra sound hardware]]. Both the Sunsoft 5B and FME-7 exist as a [[Sunsoft 5 pinout|44 pin TQFP]]. It is emulated as [[iNES Mapper 069]].
|name=FME-7
|name2=Sunsoft 5A/5B
|company=Sunsoft
|mapper=69
|nescartdbgames=9
|complexity=ASIC
|boards=JLROM, JSROM,<br />NES-BTR, others
|pinout=Sunsoft 5 pinout
|prgmax=512K (FME-7)<br>256K (5A/5B)
|prgpage=8K×4 + 8K fixed
|wrammax=512K (FME-7)
|wrampage=8K
|chrmax=256K
|chrpage=1Kx8
|mirroring=H, V, or 1, switchable
|busconflicts=No
|irq=CPU cycle counter
|audio=[[Sunsoft 5B audio|5B only]]
}}
[[Category:Mappers with large PRG RAM]][[Category:Nintendo licensed mappers]][[Category:Mappers with cycle IRQs]][[Category:Mappers with single-screen mirroring]]
The [[Sunsoft FME-7]] is a mapper IC used by Sunsoft in several of its games. It is nearly identical to the '''Sunsoft 5A''' and '''Sunsoft 5B''' mapper chips used only in Famicom games, with the 5B notably having expansion audio (see [[Sunsoft 5B audio]]).


In Europe, boards using the FME-7 were labeled as [[JxROM|JSROM and JLROM]].
The FME-7, 5A and 5B are grouped together as '''iNES Mapper 69'''.
The FME-7 mapper was used in only one game released in the US, ''Batman: Return of the Joker''.


== Overview ==
Both the Sunsoft 5B and FME-7 exist as a 44 pin TQFP chip: [[Sunsoft 5 pinout|diagram]]
* Manufacturer: Sunsoft
 
* PRG ROM Size: Up to 256 KiB on 5B (possibly up to 512 KiB on FME-7 and 5A)
In Europe, boards using the FME-7 were labeled as [[JxROM|JSROM and JLROM]]. The FME-7 mapper was used in only one game released in the US, ''Batman: Return of the Joker''. Many Japanese releases by Sunsoft used the FME-7: ''Gimmick!'', ''Hebereke'', ''Gremlins 2'' (but not in the US version), ''Barcode World'', and others.
* PRG ROM Bank Size: 8 KiB
* PRG RAM: Up to 8 KiB  (256 KiB likely supported)
* CHR capacity: 256 KiB
* CHR Bank Size: 1 KiB
* Nametable [[mirroring]]: Controlled by Mapper: H, V, 1scA, 1scB
* Subject to [[bus conflict]]s: No


== Banks ==
== Banks ==
Line 31: Line 44:


== Registers ==
== Registers ==
Configuration of the FME-7 is accomplished by first writing the command number to the Command Register, then writing the command's parameter byte to the Parameter Register.
Configuration of the FME-7 is accomplished by first writing the command number to the Command Register at $8000-9FFF, then writing the command's parameter byte to the Parameter Register at $A000-BFFF.
 
There are 16 commands:
* '''$0-7''' control CHR banking
* '''$8-B''' control PRG banking
* '''$C''' controls nametable mirroring
* '''$D-F''' controls IRQ
 
On the 5B variant, there are two additional registers at $C000-DFFF and $E000-FFFF that control the audio expansion. See: [[Sunsoft 5B audio]]


=== Command Register ($8000-$9FFF) ===
=== Command Register ($8000-$9FFF) ===
Line 48: Line 69:


== Commands ==
== Commands ==
In order to invoke a command first write the command's number to the Command Register, then the desired parameter to the Parameter Register.


=== CHR Bank 0 ($0) ===
=== CHR Bank 0-7 ($0-7) ===
  7  bit  0
  7  bit  0
  ---- ----
  ---- ----
  BBBB BBBB
  BBBB BBBB
  |||| ||||
  |||| ||||
  ++++-++++- The bank number to select at PPU $0000 - $03FF
  ++++-++++- The bank number to select for the specified bank.


=== CHR Bank 1 ($1) ===
Bank $0 - PPU $0000-$03FF
7  bit  0
  Bank $1 - PPU $0400-$07FF
  ---- ----
Bank $2 - PPU $0800-$0BFF
  BBBB BBBB
Bank $3 - PPU $0C00-$0FFF
  |||| ||||
Bank $4 - PPU $1000-$13FF
  ++++-++++- The bank number to select at PPU $0400 - $07FF
  Bank $5 - PPU $1400-$17FF
  Bank $6 - PPU $1800-$1BFF
  Bank $7 - PPU $1C00-$1FFF


=== CHR Bank 2 ($2) ===
=== PRG Bank 0 ($8) ===
7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select at PPU $0800 - $0BFF
 
=== CHR Bank 3 ($3) ===
7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select at PPU $0C00 - $0FFF
 
=== CHR Bank 4 ($4) ===
7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select at PPU $1000 - $13FF
 
=== CHR Bank 5 ($5) ===
  7  bit  0
  7  bit  0
  ---- ----
  ---- ----
  BBBB BBBB
  ERbB BBBB
  |||| ||||
  |||| ||||
  ++++-++++- The bank number to select at PPU $1400 - $17FF
  ||++-++++- The bank number to select at CPU $6000 - $7FFF
 
=== CHR Bank 6 ($6) ===
7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select at PPU $1800 - $1BFF
 
=== CHR Bank 7 ($7) ===
7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select at PPU $1C00 - $1FFF
 
=== PRG Bank 0 ($8) ===
7  bit  0
---- ----
ER.B BBBB
|| | ||||
|| +-++++- The bank number to select at CPU $6000 - $7FFF
  |+------- RAM / ROM Select Bit
  |+------- RAM / ROM Select Bit
  |        0 = PRG ROM
  |        0 = PRG ROM
Line 119: Line 99:
           1 = PRG RAM Enabled
           1 = PRG RAM Enabled


It is very likely that a cartridge could be modified to support banking up to 256KiB of PRG-RAM here. However, no game was ever released with more than 8KiB and this is currently untested.
The FME-7 has up to 6 bits for PRG banking (512 KiB), though this was never used in a game. The 5A and 5B, however, support only 5 (256 KiB)—hence the lowercase 'b' above. The extra address line is instead an audio expansion line, or unused.
 
It is [http://forums.nesdev.org/viewtopic.php?f=9&t=12467 confirmed] that the FME-7 outputs the bank number during accesses to $6000-$7FFF even if RAM is enabled.
Though Sunsoft never took advantage of this, it would allow making a cartridge that bank switches up to 256 KiB of PRG RAM.
The FME-7 mapper in Loopy's [[PowerPak]] mappers, for example, supports 32 KiB.
 
Open bus occurs if the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled), i.e. any value in the range $40-$7F. This is a limited form of WRAM write protection on power-up.


If the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled) the data bus will be open. This is a limited form of WRAM write protection on power-up.
NOTE: the enable bit is NOT functional with 2048×8, 32768×8, and 524288×8 RAMs, because those RAMs don't have a +CE input.


There is a [http://forums.nesdev.org/viewtopic.php?p=105129#p105129 tentative report] that [http://forums.nesdev.org/viewtopic.php?p=105193#p105193 not all games honor some or any of the bits in this register]. Corroboration is needed before any action is taken.
There is a [http://forums.nesdev.org/viewtopic.php?p=105129#p105129 tentative report] that [http://forums.nesdev.org/viewtopic.php?p=105193#p105193 not all games honor some or any of the bits in this register]. Corroboration is needed before any action is taken.


=== PRG Bank 1 ($9) ===
=== PRG Bank 1-3 ($9-B) ===
  7  bit  0
  7  bit  0
  ---- ----
  ---- ----
  ...B BBBB
  ..bB BBBB
    | ||||
  || ||||
    +-++++- The bank number to select at CPU $8000 - $9FFF
  ++-++++- The bank number to select for the specified bank.


=== PRG Bank 2 ($A) ===
Bank $9 - CPU $8000-$9FFF
7  bit  0
  Bank $A - CPU $A000-$BFFF
  ---- ----
  Bank $B - CPU $C000-$DFFF
  ...B BBBB
    | ||||
    +-++++- The bank number to select at CPU $A000 - $BFFF


=== PRG Bank 3 ($B) ===
The FME-7 has up to 6 bits for PRG banking, but the 5A and 5B support only 5.
7  bit  0
---- ----
...B BBBB
    | ||||
    +-++++- The bank number to select at CPU $C000 - $DFFF


=== Name Table Mirroring ($C) ===
=== Name Table Mirroring ($C) ===
These values are the same as [[MMC1]] mirroring modes with the MSB inverted.
  7  bit  0
  7  bit  0
  ---- ----
  ---- ----
Line 168: Line 147:
             0 = Disable Counter Decrement
             0 = Disable Counter Decrement
             1 = Enable Counter Decrement
             1 = Enable Counter Decrement
All writes to this register acknowledge an active IRQ.<ref>Test performed in 2015 by Oliveira using [http://forums.nesdev.org/viewtopic.php?p=142243#p142243 IRQ acknowledge test ROM on NESdev BBS]</ref> It is not yet known what will happen if this register is written to at the same time as an IRQ would have been generated.


=== IRQ Counter Low Byte ($E) ===
=== IRQ Counter Low Byte ($E) ===
Line 174: Line 155:
  LLLL LLLL
  LLLL LLLL
  |||| ||||
  |||| ||||
  ++++-++++- The low eight bits of the IRQ counter. Note that setting this register directly sets the lower eight bits of the counter.
  ++++-++++- The low eight bits of the IRQ counter


=== IRQ Counter High Byte ($F) ===
=== IRQ Counter High Byte ($F) ===
Line 181: Line 162:
  HHHH HHHH
  HHHH HHHH
  |||| ||||
  |||| ||||
  ++++-++++- The high eight bits of the IRQ counter. Note that setting this register directly sets the upper eight bits of the counter.
  ++++-++++- The high eight bits of the IRQ counter
 
Writes to the IRQ counter registers directly set the lower or upper eight bits of the counter. Unlike on MMC3, there is no separate reload latch.


== IRQ Operation ==
== IRQ Operation ==
Line 189: Line 172:
# Set the counter to the desired number of cycles minus one.
# Set the counter to the desired number of cycles minus one.
# Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
# Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
# Within the IRQ handler, turn off the IRQ Enable flag of the IRQ Control command.
# Within the IRQ handler, write to the IRQ Control command to acknowledge the IRQ.
## This acknowledges the IRQ.
# Optional: Go back to Step 1 for the next IRQ.
# Optional: Go back to Step 1 for the next IRQ.


== Disch's Notes ==
== References ==
  Here are Disch's original notes: 
<references/>
  ========================
 
  =  Mapper 069          =
== See also ==
  ========================
* [http://nesdev.org/sunsoft.txt Sunsoft Mapper] by goroh, translated by Sgt. Bowhack.
 
* [http://www.romhacking.net/documents/362/ NES Mapper List] by Disch
 
*[http://nesdev.org/mappers.zip Comprehensive NES Mapper Document] by \Firebug\
  aka
  --------------------------
  [[Sunsoft FME-7]]
  [[Sunsoft 5B audio|Sunsoft 5B]]
 
 
 
  Example Games:
  --------------------------
  Gimmick!
  Batman:  Return of the Joker
  Hebereke
  Gremlins 2 (J)
 
 
  Notes:
  --------------------------
  This mapper is FME-7 and compatible. Sunsoft 5B operates the same as FME-7, only it has [[Sunsoft 5B audio|additional sound
hardware]].  For a long time, it was thought Gimmick! uses FME-7, so the expansion sound is labeled as FME-7
  in various places -- however -- technically FME-7 has no extra sound.
 
  Gimmick! is the only known game to use the extra sound found on Sunsoft 5B
 
 
  Registers:
  --------------------------
 
  Range,Mask:  $8000-FFFF, $E000
 
    $8000:  [.... AAAA]  Address for use with $A000
 
    $A000:  [DDDD DDDD]  Data port
      R:0-7 ->  CHR Regs
      R:8-B ->  PRG Regs
      R:C  ->  Mirroring
      R=D-F ->  IRQ Control
 
    $C000:  [.... AAAA]   Address for use with $E000 (sound)
 
    $E000:  [DDDD DDDD]  Data port (sound -- see sound section)
 
 
  PRG Setup:
  ---------------------------
 
  R:8 controls $6000-7FFF. It can map in PRG-RAM, PRG-ROM, or leave it unmapped (open bus), depending on the
  mode it sets:
 
  R:8:  [ERPP PPPP]
    E = Enable RAM (0=disabled, 1=enabled)
    R = RAM/ROM select (0=ROM, 1=RAM)
    P = PRG page
 
  if E=0 and R=1, RAM is selected, but it's disabled, resulting in open bus. In case it's still unclear:
 
  R=0:      ROM @ $6000-7FFF
  R=1, E=0:  Open Bus @ $6000-7FFF
  R=1, E=1:  RAM @ $6000-7FFF
 
 
  R:9 - R:B appear to be a full 8 bits:  [PPPP PPPP], and select only ROM.
 
        $6000  $8000  $A000  $C000  $E000 
      +-------+-------+-------+-------+-------+
      |  R:8  |  R:9  |  R:A  |  R:B  | { -1} |
      +-------+-------+-------+-------+-------+
 
 
  No games seem to use more than 8k PRG-RAM, so I'm unsure whether or not it's swappable when selected.  I
  don't see why it wouldn't be.
 
 
 
  CHR Setup:
  ---------------------------
 
        $0000  $0400  $0800  $0C00  $1000  $1400  $1800  $1C00
      +-------+-------+-------+-------+-------+-------+-------+-------+
      |  R:0  |  R:1  |  R:2  |  R:3  |  R:4  |  R:5  |  R:6  |  R:7  |
      +-------+-------+-------+-------+-------+-------+-------+-------+
 
 
  Mirroring:
  ---------------------------
 
  R:C:  [.... ..MM]
    %00 = Vert
    %01 = Horz
    %10 = 1ScA
    %11 = 1ScB
 
 
  IRQs:
  ---------------------------
 
  This mapper has a 16-bit IRQ counter which decrements every CPU cycle.  When it wraps from $0000->FFFF, an
  IRQ is tripped.
 
  reg R:E sets the low 8 bits of the counter
  reg R:F sets the high 8 bits
 
    Note the regs change the actual counter -- not a reload value.
 
  reg R:D is the IRQ control:
    [C... ...T]
    C = Enable countdown (0=disabled, 1=enabled)
    T = Enable IRQ triggering (0=disabled, 1=enabled)
 
  In order for IRQs to work as expected, both bits must be set.  If either bit is cleared, an IRQ won't occur:
 
  C=0, T=1:  IRQs are enabled, but the counter will never decrement
  C=1, T=0:  Counter decrements, but IRQs are disabled
 
  Acknowledging IRQs can only be done by disabling them (T=0).

Latest revision as of 19:04, 28 May 2021

FME-7
Sunsoft 5A/5B
Company Sunsoft
Games 9 in NesCartDB
Complexity ASIC
Boards JLROM, JSROM,
NES-BTR, others
Pinout Sunsoft 5 pinout
PRG ROM capacity 512K (FME-7)
256K (5A/5B)
PRG ROM window 8K×4 + 8K fixed
PRG RAM capacity 512K (FME-7)
PRG RAM window 8K
CHR capacity 256K
CHR window 1Kx8
Nametable mirroring H, V, or 1, switchable
Bus conflicts No
IRQ CPU cycle counter
Audio 5B only
iNES mappers 069

The Sunsoft FME-7 is a mapper IC used by Sunsoft in several of its games. It is nearly identical to the Sunsoft 5A and Sunsoft 5B mapper chips used only in Famicom games, with the 5B notably having expansion audio (see Sunsoft 5B audio).

The FME-7, 5A and 5B are grouped together as iNES Mapper 69.

Both the Sunsoft 5B and FME-7 exist as a 44 pin TQFP chip: diagram

In Europe, boards using the FME-7 were labeled as JSROM and JLROM. The FME-7 mapper was used in only one game released in the US, Batman: Return of the Joker. Many Japanese releases by Sunsoft used the FME-7: Gimmick!, Hebereke, Gremlins 2 (but not in the US version), Barcode World, and others.

Banks

  • CPU $6000-$7FFF: 8 KB Bankable PRG ROM or PRG RAM
  • CPU $8000-$9FFF: 8 KB Bankable PRG ROM
  • CPU $A000-$BFFF: 8 KB Bankable PRG ROM
  • CPU $C000-$DFFF: 8 KB Bankable PRG ROM
  • CPU $E000-$FFFF: 8 KB PRG ROM, fixed to the last bank of ROM
  • PPU $0000-$03FF: 1 KB Bankable CHR ROM
  • PPU $0400-$07FF: 1 KB Bankable CHR ROM
  • PPU $0800-$0BFF: 1 KB Bankable CHR ROM
  • PPU $0C00-$0FFF: 1 KB Bankable CHR ROM
  • PPU $1000-$13FF: 1 KB Bankable CHR ROM
  • PPU $1400-$17FF: 1 KB Bankable CHR ROM
  • PPU $1800-$1BFF: 1 KB Bankable CHR ROM
  • PPU $1C00-$1FFF: 1 KB Bankable CHR ROM

Registers

Configuration of the FME-7 is accomplished by first writing the command number to the Command Register at $8000-9FFF, then writing the command's parameter byte to the Parameter Register at $A000-BFFF.

There are 16 commands:

  • $0-7 control CHR banking
  • $8-B control PRG banking
  • $C controls nametable mirroring
  • $D-F controls IRQ

On the 5B variant, there are two additional registers at $C000-DFFF and $E000-FFFF that control the audio expansion. See: Sunsoft 5B audio

Command Register ($8000-$9FFF)

7  bit  0
---- ----
.... CCCC
     ||||
     ++++- The command number to invoke when writing to the Parameter Register

Parameter Register ($A000-$BFFF)

7  bit  0
---- ----
PPPP PPPP
|||| ||||
++++-++++- The parameter to use for this command. Writing to this register invokes the command in the Command Register.

Commands

CHR Bank 0-7 ($0-7)

7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select for the specified bank.

Bank $0 - PPU $0000-$03FF
Bank $1 - PPU $0400-$07FF
Bank $2 - PPU $0800-$0BFF
Bank $3 - PPU $0C00-$0FFF
Bank $4 - PPU $1000-$13FF
Bank $5 - PPU $1400-$17FF
Bank $6 - PPU $1800-$1BFF
Bank $7 - PPU $1C00-$1FFF

PRG Bank 0 ($8)

7  bit  0
---- ----
ERbB BBBB
|||| ||||
||++-++++- The bank number to select at CPU $6000 - $7FFF
|+------- RAM / ROM Select Bit
|         0 = PRG ROM
|         1 = PRG RAM
+-------- RAM Enable Bit (6264 +CE line)
          0 = PRG RAM Disabled
          1 = PRG RAM Enabled

The FME-7 has up to 6 bits for PRG banking (512 KiB), though this was never used in a game. The 5A and 5B, however, support only 5 (256 KiB)—hence the lowercase 'b' above. The extra address line is instead an audio expansion line, or unused.

It is confirmed that the FME-7 outputs the bank number during accesses to $6000-$7FFF even if RAM is enabled. Though Sunsoft never took advantage of this, it would allow making a cartridge that bank switches up to 256 KiB of PRG RAM. The FME-7 mapper in Loopy's PowerPak mappers, for example, supports 32 KiB.

Open bus occurs if the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled), i.e. any value in the range $40-$7F. This is a limited form of WRAM write protection on power-up.

NOTE: the enable bit is NOT functional with 2048×8, 32768×8, and 524288×8 RAMs, because those RAMs don't have a +CE input.

There is a tentative report that not all games honor some or any of the bits in this register. Corroboration is needed before any action is taken.

PRG Bank 1-3 ($9-B)

7  bit  0
---- ----
..bB BBBB
  || ||||
  ++-++++- The bank number to select for the specified bank.

Bank $9 - CPU $8000-$9FFF
Bank $A - CPU $A000-$BFFF
Bank $B - CPU $C000-$DFFF

The FME-7 has up to 6 bits for PRG banking, but the 5A and 5B support only 5.

Name Table Mirroring ($C)

These values are the same as MMC1 mirroring modes with the MSB inverted. 

7  bit  0
---- ----
.... ..MM
       ||
       ++- Mirroring Mode
            0 = Vertical
            1 = Horizontal
            2 = One Screen Mirroring from $2000 ("1ScA")
            3 = One Screen Mirroring from $2400 ("1ScB")

IRQ Control ($D)

7  bit  0
---- ----
C... ...T
|       |
|       +- IRQ Enable
|           0 = Do not generate IRQs
|           1 = Do generate IRQs
+-------- IRQ Counter Enable
            0 = Disable Counter Decrement
            1 = Enable Counter Decrement

All writes to this register acknowledge an active IRQ.[1] It is not yet known what will happen if this register is written to at the same time as an IRQ would have been generated.

IRQ Counter Low Byte ($E)

7  bit  0
---- ----
LLLL LLLL
|||| ||||
++++-++++- The low eight bits of the IRQ counter

IRQ Counter High Byte ($F)

7  bit  0
---- ----
HHHH HHHH
|||| ||||
++++-++++- The high eight bits of the IRQ counter

Writes to the IRQ counter registers directly set the lower or upper eight bits of the counter. Unlike on MMC3, there is no separate reload latch.

IRQ Operation

The IRQ feature of FME-7 is a CPU cycle counting IRQ generator. When enabled the 16-bit IRQ counter is decremented once per CPU cycle. When the IRQ counter is decremented from $0000 to $FFFF an IRQ is generated. The IRQ line is held low until it is acknowledged.

How to Use the IRQ Generator

  1. Set the counter to the desired number of cycles minus one.
  2. Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
  3. Within the IRQ handler, write to the IRQ Control command to acknowledge the IRQ.
  4. Optional: Go back to Step 1 for the next IRQ.

References

  1. ↑ Test performed in 2015 by Oliveira using IRQ acknowledge test ROM on NESdev BBS

See also

Retrieved from "https://www.nesdev.org/w/index.php?title=Sunsoft_FME-7&oldid=11491"