|
|
| (5 intermediate revisions by 3 users not shown) |
| Line 1: |
Line 1: |
| '''SNROM''' (NES-SNROM and HVC-SNROM) is a common board within the [[SxROM]] set. Like other SxROM boards, SNROM uses the [[MMC1|Nintendo MMC1]] ASIC.
| | #REDIRECT [[SxROM]] |
| | |
| == Overview ==
| |
| * PRG ROM size: 128 or 256 KB
| |
| * PRG ROM bank size: 16 KB or 32 KB
| |
| * PRG RAM: 8 KB plus optional battery
| |
| * CHR capacity: 8 KB RAM
| |
| * CHR bank size: 8 KB or 4 KB
| |
| * Nametable [[mirroring]]: Controlled by mapper
| |
| * Subject to [[bus conflict]]s: No
| |
| | |
| == Solder pad config ==
| |
| * PRG RAM retaining data : The pad below D2 (named 'SL' in recent revisions) disconected, and with Battery, D1, D2 and R2 present.
| |
| * PRG RAM not retaining data : Leave slots for Battery, D1, D2 and R2 free, and the pad below D2 (also named 'SL' in recent revisions) connected.
| |
| | |
| == Banks ==
| |
| * CPU $6000-$7FFF: 8 KB PRG RAM bank, fixed
| |
| * CPU $8000-$BFFF: 16 KB PRG ROM bank, either switchable or fixed to the first bank
| |
| * CPU $C000-$FFFF: 16 KB PRG ROM bank, either fixed to the last bank or switchable
| |
| * PPU $0000-$0FFF: 4 KB switchable CHR RAM bank
| |
| * PPU $1000-$1FFF: 4 KB switchable CHR RAM bank
| |
| | |
| == Chips and pinouts ==
| |
| * PRG ROM - 2 MBits (256 kB x 8) (DIP-32)
| |
| | |
| ---_---
| |
| A17 - |01 32| - +5V
| |
| /CE - |02 31| - +5V
| |
| A15 - |03 30| - +5V
| |
| A12 - |04 29| - A14
| |
| A7 - |05 28| - A13
| |
| A6 - |06 27| - A8
| |
| A5 - |07 26| - A9
| |
| A4 - |08 25| - A11
| |
| A3 - |09 24| - A16
| |
| A2 - |10 23| - A10
| |
| A1 - |11 22| - /CE
| |
| A0 - |12 21| - D7
| |
| D0 - |13 20| - D6
| |
| D1 - |14 19| - D5
| |
| D2 - |15 18| - D4
| |
| GND - |16 17| - D3
| |
| -------
| |
| PRG ROMs of 1 MBit (128 kB x 8) comes in a DIP-28 packages are sit 2 rows back (only pins 3 to 30 are used).
| |
| This pinout is not compatible with stantard 27C020 EPROMs, nor with standard 27C010 EPROMs, so to insert them in the board manual rewiring is needed.
| |
| | |
| * CHR RAM - 64 KBits (8 KB x 8) : Standard [[6264]] pinout.
| |
| | |
| * PRG RAM - 64 KBits (8 KB x 8) : Standard [[6264]] pinout.
| |
| | |
| * [[MMC1_pinout|MMC1 pinout]]
| |
| | |
| == See also ==
| |
| *[[MMC1|Nintendo MMC1]]
| |
