Namcot 163 family pinout: Difference between revisions
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(fr) CPU D7 <-> \13 36/ <- PPU A12 (f) | (fr) CPU D7 <-> \13 36/ <- PPU A12 (f) | ||
(fr) CPU D6 <-> \14 35/ <- PPU A13 (f) | (fr) CPU D6 <-> \14 35/ <- PPU A13 (f) | ||
(fr) CPU D5 <-> \15 34/ -- GND | (fr) CPU D5 <-> \15 34/ -- GND | ||
(fr) CPU D4 <-> \16 33/ <- PPU /RD (f) | (fr) CPU D4 <-> \16 33/ <- PPU /RD (f) or GND (see below) | ||
(fr) CPU D3 <-> \17 32/ -- +5V | (fr) CPU D3 <-> \17 32/ -- +5V | ||
(fr) CPU D2 <-> \18 31/ -- GND | (fr) CPU D2 <-> \18 31/ -- GND | ||
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30 pull-down resistor present on boards with battery for low-power mode | 30 pull-down resistor present on boards with battery for low-power mode | ||
33 Ground this pin with if CHR's nOE and nCS lines are separate | 33 Ground this pin with if CHR's nOE and nCS lines are separate | ||
34 | 34 No function | ||
40 6264 /CE connected to this pin | 40 6264 /CE connected to this pin | ||
44 Might be an enable for CHR RAM, can't find an example of it being used | 44 Might be an enable for CHR RAM, can't find an example of it being used | ||
Revision as of 05:01, 13 July 2016
The Namcot 129 and 163 seem to be identical. The Namcot 175 and 340 have minor but vital differences.
Namcot 129 and 163: 48-pin QFP (canonically iNES Mapper 019)
/ \
(f) SOUND <- /01 48\ -> CHR A14 (r)
(r) CHR A13 <- /02 47\ -> CHR A15 (r)
(r) CHR A12 <- /03 46\ -> CHR A16 (r)
(r) CHR A11 <- /04 45\ -> CHR A17 (r)
(fr)*CHR A10 <- /05 44\ -> ?
GND - /06 43\ -- +5v
(r) PRG A18 <- /07 42\ -> CIRAM /CE (f)
(r) PRG A17 <- /08 41\ -> CHR ROM /CE (r)
(r) PRG A16 <- /09 40\ -> WRAM /CE (w)
(r) PRG A15 <- /10 39\ -> /IRQ (f)
(r) PRG A14 <- /11 38\ <- PPU A10 (f)
(r) PRG A13 <- /12 37\ <- PPU A11 (f)
(fr) CPU D7 <-> \13 36/ <- PPU A12 (f)
(fr) CPU D6 <-> \14 35/ <- PPU A13 (f)
(fr) CPU D5 <-> \15 34/ -- GND
(fr) CPU D4 <-> \16 33/ <- PPU /RD (f) or GND (see below)
(fr) CPU D3 <-> \17 32/ -- +5V
(fr) CPU D2 <-> \18 31/ -- GND
+5v - \19 30/ <- M2 (f)
(fr) CPU D1 <-> \20 29/ <- R/W (fw)
(fr) CPU D0 <-> \21 28/ <- /ROMSEL (f)
GND? - \22 27/ <- CPU A14 (f)
(r) PRG /CE <- \23 26/ <- CPU A13 (f)
(fr) CPU A11 -> \24 25/ <- CPU A12 (fr)
\ /
\_/
05 also connects to CIRAM A10
19,32,43 Some boards connect a battery (through a standard diode switch) to this pin to make the waveform memory nonvolatile
22 Some boards this is connected to +5V, some to Gnd, so probably an input
30 pull-down resistor present on boards with battery for low-power mode
33 Ground this pin with if CHR's nOE and nCS lines are separate
34 No function
40 6264 /CE connected to this pin
44 Might be an enable for CHR RAM, can't find an example of it being used
(r) - this pin connects to the ROM chips
(f) - this pin connects to the Famicom connector
(w) - this pin connects to the WRAM
Namcot 175: 48-pin QFP (canonically iNES Mapper 210)
01 sound was removed 05 CIRAM A10 is hardwired to PPU A10 or A11 as appropriate 39 does not provide IRQs 42 does not allow for ROM nametables
Namcot 340: 48-pin QFP (also iNES Mapper 210)
42\ -> ?
41\ -> ?
40\ -> CHR /CE (r)
39\ -> CIRAM A10 (f)
01 sound was also removed.
