Namcot 108 family pinout: Difference between revisions
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(er, the vs system module with the N127 also has a 108, so it's probably not the same; remove that bit.) |
(Tengen's MIMIC-1 pinout (per Kevtris) is identical to the Namco 108 pinout.) |
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Namcot 108, 109, 118, 119: 28-pin shrink PDIP (Canonically [[INES Mapper 206|mapper 206]]). | Namcot 108, 109, 118, 119: 28-pin shrink PDIP, also Tengen 337001 or MIMIC-1: 28-pin 0.6" PDIP (Canonically [[INES Mapper 206|mapper 206]]). | ||
.--\/--. | .--\/--. | ||
(n) CPU A14 -> |01 28| -> PRG A15 (r) | (n) CPU A14 -> |01 28| -> PRG A15 (r) | ||
| Line 16: | Line 16: | ||
(r) CHR A12 <- |14 15| <- PPU A12 (n) | (r) CHR A12 <- |14 15| <- PPU A12 (n) | ||
`------' | `------' | ||
No behavioral differences are known between the | No behavioral differences are known between the five different part numbers; [http://bootgod.dyndns.org:7777/profile.php?id=3247 several] [http://bootgod.dyndns.org:7777/profile.php?id=3185 games] were released on the same board with identical code and different mapper ICs. | ||
Many boards (and thus iNES mappers) redefined parts of the pinout for various extensions, mostly to increase the amount of addressable CHR ROM. | Many boards (and thus iNES mappers) redefined parts of the pinout for various extensions, mostly to increase the amount of addressable CHR ROM. | ||
Revision as of 21:33, 8 October 2013
Namcot 108, 109, 118, 119: 28-pin shrink PDIP, also Tengen 337001 or MIMIC-1: 28-pin 0.6" PDIP (Canonically mapper 206).
.--\/--.
(n) CPU A14 -> |01 28| -> PRG A15 (r)
(s) CPU A0 -> |02 27| -> PRG A14 (r)
(s) CPU D5 -> |03 26| <- M2 (n)
(s) CPU D0 -> |04 25| -> PRG A13 (r)
(s) CPU D4 -> |05 24| <- CPU A13 (n)
(s) CPU D1 -> |06 23| -> PRG A16 (r)
Gnd -- |07 22| -> PRG /CE (r)
(s) CPU D3 -> |08 21| -- +5V
(s) CPU D2 -> |09 20| -> CHR A13 (r)
(n) /ROMSEL -> |10 19| -> CHR A11 (r)
(n) R/W -> |11 18| -> CHR A10 (r)
(r) CHR A15 <- |12 17| <- PPU A10 (n)
(r) CHR A14 <- |13 16| <- PPU A11 (n)
(r) CHR A12 <- |14 15| <- PPU A12 (n)
`------'
No behavioral differences are known between the five different part numbers; several games were released on the same board with identical code and different mapper ICs.
Many boards (and thus iNES mappers) redefined parts of the pinout for various extensions, mostly to increase the amount of addressable CHR ROM.
(s) CPU D2 -> |09 20| -> CHR A14 (r)
(n) /ROMSEL -> |10 19| -> CHR A12 (r)
(n) R/W -> |11 18| -> CHR A11 (r)
(r) CHR A16 <- |12 17| <- PPU A11 (n)
(r) CHR A15 <- |13 16| <- PPU A12 (n)
(r) CHR A13 <- |14 15| <- +5V
`------'
(n) PPU A10 -> CHR A10 (r)
Mappers 88 and 154 connect (n) PPU A12 -> CHR A16 (r), skipping the mapper IC altogether.
(n) CIRAM A10 <- |12 17| <- PPU A10 (n)
(r) CHR A14 <- |13 16| <- PPU A11 (n)
(r) CHR A12 <- |14 15| <- PPU A12 (n)
`------'
