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| [[Category:ASIC mappers]]
| | #REDIRECT [[INES Mapper 019]] |
| The Namco 129 and 163 with expansion sound are assigned to [[INES Mapper 019|iNES Mapper 19]], while simpler variants using the Namco 175 and 340 ICs have simpler mirroring and are assigned to [[iNES Mapper 210]].
| | [[Category:Mappers with CHR ROM and CHR RAM]][[Category:Mappers using $4020-$5FFF]][[Category:ASIC mappers]][[Category:Mappers with ROM nametables]][[Category:Mappers with cycle IRQs]][[Category:Mappers with single-screen mirroring]] |
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| == Overview ==
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| * PRG ROM size: Up to 512 KB
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| * PRG ROM bank size: 8 KB
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| * PRG RAM: Up to 8 KB
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| * CHR capacity: Up to 256 KB ROM and/or 32 KB RAM simultaneously [[Category:Mappers with CHR RAM]]
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| * CHR bank size: 1 KB
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| * Nametable [[mirroring]]: Controlled by mapper (Mapper 19), hardwired (Mapper 210)
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| * Subject to [[bus conflict]]s: No
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| == Banks ==
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| * CPU $6000-$7FFF: 8 KB PRG RAM bank
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| * CPU $8000-$9FFF: 8 KB switchable PRG ROM bank
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| * CPU $A000-$BFFF: 8 KB switchable PRG ROM bank
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| * CPU $C000-$DFFF: 8 KB switchable PRG ROM bank
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| * CPU $E000-$FFFF: 8 KB PRG ROM bank, fixed to the last bank
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| * PPU $0000-$03FF: 1 KB switchable CHR bank
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| * PPU $0400-$07FF: 1 KB switchable CHR bank
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| * PPU $0800-$0BFF: 1 KB switchable CHR bank
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| * PPU $0C00-$0FFF: 1 KB switchable CHR bank
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| * PPU $1000-$13FF: 1 KB switchable CHR bank
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| * PPU $1400-$17FF: 1 KB switchable CHR bank
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| * PPU $1800-$1BFF: 1 KB switchable CHR bank
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| * PPU $1C00-$1FFF: 1 KB switchable CHR bank
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| == Registers ==
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| The 163 has 19 registers within $4800-$5FFF and $8000-$FFFF, while the the 175 and 340 only have 12. Each register occupies a range of $800 bytes, so $4800-$4FFF all refers to one register, $5000-$57FF all refers to another register, and so on.
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| === Sound Data Port ($4800-$4FFF) r/w (Namco 129,163 only) ===
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| See [[Namco 163 audio]].
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| === IRQ Counter (low) ($5000-$57FF) r/w (Namco 129,163 only) ===
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| 7 bit 0
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| ---- ----
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| IIII IIII
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| |||| ||||
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| ++++-++++- Low 8 bits of IRQ counter
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| === IRQ Counter (high) / IRQ Enable ($5800-$5FFF) r/w (Namco 129,163 only) ===
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| 7 bit 0
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| ---- ----
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| EIII IIII
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| |||| ||||
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| |+++-++++- High 7 bits of IRQ counter
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| +--------- IRQ Enable: (0: disabled; 1: enabled)
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| === CHR Select 1…4 ($8000-$87FF,$8800,$9000,$9800) w ===
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| {| class="wikitable"
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| ! Write to CPU address !! 1KB CHR bank affected
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| |-
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| | $8000-$87FF || $0000-$03FF
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| |-
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| | $8800-$8FFF || $0400-$07FF
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| |-
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| | $9000-$97FF || $0800-$0BFF
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| |-
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| | $9800-$9FFF || $0C00-$0FFF
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| |}
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| '''Note:''' Only on Mapper 19 = Namco 129/163, pages $E0-$FF are CHR-RAM, as long as [[Namco 163#PRG_Select_2_.2F_CHR-RAM_Enable_.28.24E800-.24EFFF.29_w|$E800]].'''6''' is set to 0. If $E800.'''6''' is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.
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| === CHR Select 5…8 ($A000-$A7FF,$A800,$B000,$B800) w ===
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| {| class="wikitable"
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| ! Write to CPU address !! 1KB CHR bank affected
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| |-
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| | $A000-$A7FF || $1000-$13FF
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| |-
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| | $A800-$AFFF || $1400-$17FF
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| |-
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| | $B000-$B7FF || $1800-$1BFF
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| |-
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| | $B800-$BFFF || $1C00-$1FFF
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| |}
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| '''Note:''' Only on Mapper 19 = Namco 129/163, pages $E0-$FF are CHR-RAM, as long as [[Namco 163#PRG_Select_2_.2F_CHR-RAM_Enable_.28.24E800-.24EFFF.29_w|$E800]].'''7''' is set to 0. If $E800.'''7''' is set to 1, then pages $E0-$FF refer to the last $20 pages of CHR-ROM as you'd expect.
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| === Nametable Select 1…4 ($C000-$C7FF,$C800,$D000,$D800) w (Namco 129,163 only) ===
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| {| class="wikitable"
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| ! Write to CPU address !! 1KB nametable affected
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| |-
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| | $C000-$C7FF || $2000-$23FF
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| |-
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| | $C800-$CFFF || $2400-$27FF
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| |-
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| | $D000-$D7FF || $2800-$2BFF
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| |-
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| | $D800-$DFFF || $2C00-$2FFF
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| |}
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| {| class="wikitable"
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| ! Value CPU writes !! Behavior
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| |-
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| | $00-$DF || Use a 1KB page of CHR-ROM as a nametable
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| |-
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| | $E0-$FF || Use the NES's internal nametables (even values for A, odd values for B)
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| |}
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| '''Note:''' With mapper 210, a.k.a. Namco 175 or 340, these nametable selection registers have no effect.
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| === External PRG RAM enable ($C000-$C7FF) w (Namco 175 (340?) only) ===
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| 7 bit 0
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| ---- ----
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| .... ...E
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| +- 1: Enable PRG RAM
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| === PRG Select 1 ($E000-$E7FF) w ===
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| 7 bit 0
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| ---- ----
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| MMPP PPPP
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| |||| ||||
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| ||++-++++- Select 8KB page of PRG-ROM at $8000
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| |+-------- Namco 129, 163 only: Disable sound if set
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| ++-------- Namco 340 only: Select mirroring
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| 0: One-screen A
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| 1: Vertical
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| 2: Horizontal
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| 3: One-screen B
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| === PRG Select 2 / CHR-RAM Enable ($E800-$EFFF) w ===
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| 7 bit 0
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| ---- ----
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| HLPP PPPP
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| |||| ||||
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| ||++-++++- Select 8KB page of PRG-ROM at $A000
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| |+-------- Disable CHR-RAM at $0000-$0FFF (Namco 129, 163 only)
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| | 0: Pages $E0-$FF are CHR-RAM
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| | 1: Pages $E0-$FF are the last $20 banks of CHR-ROM)
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| +--------- Disable CHR-RAM at $1000-$1FFF (Namco 129, 163 only)
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| 0: Pages $E0-$FF are CHR-RAM
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| 1: Pages $E0-$FF are the last $20 banks of CHR-ROM)
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| === PRG Select 3 ($F000-$F7FF) w ===
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| 7 bit 0
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| ---- ----
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| ..PP PPPP
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| || ||||
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| ++-++++- Select 8KB page of PRG-ROM at $C000
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| === Write Protect for External RAM AND Sound Address Port ($F800-$FFFF) w (Namco 129, 163 only) ===
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| 7 bit 0
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| ---- ----
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| KKKK DCBA
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| |||| ||||
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| |||| |||+- 1: Write-protect 2kB window of external RAM from $6000-$67FF (0: write enable)
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| |||| ||+-- 1: Write-protect 2kB window of external RAM from $6800-$6FFF (0: write enable)
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| |||| |+--- 1: Write-protect 2kB window of external RAM from $7000-$77FF (0: write enable)
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| |||| +---- 1: Write-protect 2kB window of external RAM from $7800-$7FFF (0: write enable)
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| ++++------ Must = b0100 to enable writes
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| Also see [[Namco 163 audio]].
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| == IRQ Operation ==
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| The IRQ is a 15-bit CPU cycle up-counter. $5000 and $5800 provide ''direct'' access to the counter itself (i.e., this isn't a reload value). Games can read and write to these registers in realtime.
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| The IRQ counter increments on each CPU cycle. Upon reaching $7FFF, an IRQ is fired. However, it is unknown if the counter wraps to $0000 afterwards. Reading/Writing to $5000 or $5800 will acknowledge any pending IRQs.
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| == References ==
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| All of the below are in Japanese:
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| *[http://forums.nesdev.org/viewtopic.php?p=77795#77795 Naruko's post to the forum]
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| *[http://unagi.sourceforge.jp/cgi-bin/hiki/hiki.cgi?163_namco Wiki on same]
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| *[http://d.hatena.ne.jp/na6ko/20110501/1304181038 Naruko's blog's post on mirroring on the 340]
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| *[http://d.hatena.ne.jp/na6ko/20110430/1304099059 Naruko's blog's post on the write protect register at $F800]
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