BNROM: Difference between revisions
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[[AxROM|AMROM]] is the same as BNROM except it uses bit 4 of the register to control a single screen mirroring configuration, instead of fixed mirroring. | [[AxROM|AMROM]] is the same as BNROM except it uses bit 4 of the register to control a single screen mirroring configuration, instead of fixed mirroring. | ||
The upper 2 bank select bits on the 74HC161 were left unconnected. These bits could have been used for an [[Oversize|oversize]] variant of BNROM supporting up to 512 KB of PRG ROM. Some emulators support this oversize variation, as well as the PowerPak[http://forums.nesdev.org/viewtopic.php?p=79826#p79826]. | The upper 2 bank select bits on the 74HC161 were left unconnected. These bits could have been used for an [[Oversize|oversize]] variant of BNROM supporting up to 512 KB of PRG ROM. Some emulators support this oversize variation, as well as the PowerPak since a [http://forums.nesdev.org/viewtopic.php?p=79826#p79826 mapper update in June 2011]. | ||
Theoretically the bank select register could be implemented with a [[74377|74HC377]] octal latch, allowing up to 8 MB of PRG ROM. | Theoretically the bank select register could be implemented with a [[74377|74HC377]] octal latch, allowing up to 8 MB of PRG ROM. | ||
[[Category:Discrete logic mappers]] | [[Category:Discrete logic mappers]] | ||
Revision as of 19:31, 16 March 2014
The designation BNROM refers to the Irem cartridge board "Irem I-IM" and to its NES workalike, the Nintendo cartridge board NES-BNROM. These boards were used only for one game: Deadly Towers (Japanese Mashou). The iNES format assigns mapper 34 to BNROM (as well as NINA-001).
Overview
- PRG ROM size: 128 KB (DIP-28 Nintendo pinout)
- PRG ROM bank size: 32 KB
- PRG RAM: None
- CHR capacity: 8 KB RAM
- CHR bank size: Not bankswitched
- Nametable mirroring: Solder pads select vertical or horizontal mirroring
- Subject to bus conflicts: Yes
The bank number at power on is not defined. The 6502's vectors must be present in all banks, along with the NMI, reset, and IRQ handlers.
Banks
- CPU $8000-$FFFF: 32 KB switchable PRG ROM bank
Solder pad config
- Horizontal mirroring : 'H' disconnected, 'V' connected.
- Vertical mirroring : 'H' connected, 'V' disconnected.
Registers
Bank select ($8000-$FFFF)
7 bit 0
---- ----
xxxx xxPP
||
++- Select 32 KB PRG ROM bank for CPU $8000-$FFFF
Hardware
The BxROM board contains a 74HC161 binary counter used as a quad D latch (4-bit register) to select the current PRG bank.
Variants
The iNES mapper used to implement this mapper also includes three additional registers at $7FFD-$7FFF for emulation of the NINA-001 board (using CHR ROM instead of RAM, as well as supporting 8KB of PRG RAM), which has caused many headaches for NES emulator authors. Emulator developers may consider switching between NINA-001 emulation and BxROM emulation based on the presence of CHR ROM.
AMROM is the same as BNROM except it uses bit 4 of the register to control a single screen mirroring configuration, instead of fixed mirroring.
The upper 2 bank select bits on the 74HC161 were left unconnected. These bits could have been used for an oversize variant of BNROM supporting up to 512 KB of PRG ROM. Some emulators support this oversize variation, as well as the PowerPak since a mapper update in June 2011.
Theoretically the bank select register could be implemented with a 74HC377 octal latch, allowing up to 8 MB of PRG ROM.
