NINA-003-006: Difference between revisions

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[[Category:GNROM-like mappers]]
[[Category:In NesCartDB]][[Category:GNROM-like mappers]][[Category:Mappers using $4020-$5FFF]]
'''NINA-03''' and '''NINA-06''' are unlicensed boards produced by American Video Entertainment. They only differ in the nature of the CIC — the former always has a microcontroller, the latter may instead have a charge pump.
{{Infobox iNES mapper
|name=NINA-003-006
|company=American Video Entertainment
|mapper=79
|boards=NINA-03, NINA-06
|prgmax=64K
|prgpage=32K
|chrmax=64K
|chrpage=8k
|busconflicts=No
}}
{{nesdbbox
|ines|79|iNES 079
}}
'''iNES Mapper 079''' denotes the 72-pin '''NINA-03''' and '''NINA-06''' circuit boards, produced by [[wikia:c:bootleggames:American Video Entertainment|American Video Entertainment]]. They only differ in the nature of the CIC — the former always has a microcontroller, the latter may instead have a charge pump. The [[iNES]] format designates '''mapper 79''' to NINA-03 and NINA-06.


== Overview ==
'''iNES Mapper 146''' denotes the 60-pin '''Sachen 3015''' circuit board, which is functionally identical.
* PRG ROM size: up to 256 KB
* PRG ROM bank size: 32 KB
* PRG RAM: None
* CHR ROM capacity: up to 128 KB
* CHR bank size: 8 KB
* Nametable [[mirroring]]: hardwired to vertical or horizontal mirroring, or controlled by mapper (depending on type)
* Subject to [[bus conflict]]s: No


== Banks ==
== Banks ==
Line 26: Line 33:
  7  bit  0
  7  bit  0
  ---- ----
  ---- ----
  MCPP PCCC
  .... PCCC
|||| ||||
      ||||
|+||-|+++-- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
      |+++-- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
| ++-+----- Select 32 KB PRG ROM bank for CPU $8000-$FFFF
      +----- Select 32 KB PRG ROM bank for CPU $8000-$FFFF
+---------- Select mirroring (clear: horizontal, set: verical)


The mirroring bit should only be honored on the board type used by ''HES 6-in-1'', ''Mind Blower Pak'', and ''Total Funpak (HES)'', which is [[iNES Mapper 113|mapper 113]]. On [[iNES Mapper 079|mapper 79]], this bit is ignored.
== Variants ==
HES/AVE released three multicarts of NINA-06 games (''HES 6-in-1'', ''Mind Blower Pak'', and ''Total Funpak (HES)''), which is [[iNES Mapper 113|mapper 113]]. The multicart increases the bankable memory to 256 KiB PRG and 128 KiB CHR, and adds run-time selectable mirroring.
[[iNES Mapper 148]] has the same bit assignment in the data latch, but moves the latch register to the CPU $8000-$FFFF register, introducing bus conflicts.
 
== Errata ==
For mapper 79 but not 146, FCEUX additionally implements a CNROM switch at CPU $8000-$FFFF, apparently to run a few [[INES Mapper 003|mapper 3]] games that are incorrectly set to mapper 79 in GoodNES 3.23b.

Latest revision as of 01:52, 28 October 2020

NINA-003-006
Company American Video Entertainment
Boards NINA-03, NINA-06
PRG ROM capacity 64K
PRG ROM window 32K
PRG RAM capacity None
CHR capacity 64K
CHR window 8k
Nametable mirroring Fixed H or V, controlled by solder pads
Bus conflicts No
IRQ No
Audio No
iNES mappers 079
NESCartDB
iNES 079

iNES Mapper 079 denotes the 72-pin NINA-03 and NINA-06 circuit boards, produced by American Video Entertainment. They only differ in the nature of the CIC — the former always has a microcontroller, the latter may instead have a charge pump. The iNES format designates mapper 79 to NINA-03 and NINA-06.

iNES Mapper 146 denotes the 60-pin Sachen 3015 circuit board, which is functionally identical.

Banks

  • CPU $8000-$FFFF: 32 KB switchable PRG ROM bank
  • PPU $0000-$1FFF: 8 KB switchable CHR ROM bank

Registers

Control Register

This register is located at addresses:

F        bit      0
---- ---- ---- ----
010x xxx1 xxxx xxxx

That is, $4100-$41FF, $4300-$43FF, $45xx, $47xx, ..., $5Dxx, and $5Fxx.

7  bit  0
---- ----
.... PCCC
     ||||
     |+++-- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
     +----- Select 32 KB PRG ROM bank for CPU $8000-$FFFF

Variants

HES/AVE released three multicarts of NINA-06 games (HES 6-in-1, Mind Blower Pak, and Total Funpak (HES)), which is mapper 113. The multicart increases the bankable memory to 256 KiB PRG and 128 KiB CHR, and adds run-time selectable mirroring. iNES Mapper 148 has the same bit assignment in the data latch, but moves the latch register to the CPU $8000-$FFFF register, introducing bus conflicts.

Errata

For mapper 79 but not 146, FCEUX additionally implements a CNROM switch at CPU $8000-$FFFF, apparently to run a few mapper 3 games that are incorrectly set to mapper 79 in GoodNES 3.23b.