NES 2.0 Mapper 344: Difference between revisions
From NESdev Wiki
Jump to navigationJump to search
m (defaultsort) |
NewRisingSun (talk | contribs) (Rewrite based on correct ROM image, add other PCB name (and the mixed-up UNIF name)) |
||
Line 1: | Line 1: | ||
{{DEFAULTSORT:344}}[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]] | {{DEFAULTSORT:344}}[[Category:Multicart mappers]][[Category:MMC3-like mappers]][[Category:Mappers with scanline IRQs]] | ||
NES 2.0 Mapper 344 | '''NES 2.0 Mapper 344''' denotes the '''GN-26''' and '''NC7000M''' multicart circuit boards. Its UNIF board names are '''BMC-GN-26''' (with incorrect PRG bank order) and '''BMC-BS-110''' (which is the name of a different PCB whose name was mixed-up). | ||
* ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1'', GN-26 PCB | |||
* ''14/400/8000/3000000-in-1'', NC7000M PCB | |||
==Outer Bank and Mode Register ($6000-$7FFF, write)== | ==Outer Bank and Mode Register ($6000-$7FFF, write)== | ||
Line 7: | Line 10: | ||
A~FEDC BA98 7654 3210 | A~FEDC BA98 7654 3210 | ||
------------------- | ------------------- | ||
.... .... .. | .... .... .... DSBb | ||
++++- =$04: CHR A17=MMC3 A17 (256 KiB inner CHR) | |||
|||| !=$04: CHR A17=b (128 KiB inner CHR) | |||
|||| =$08: CPU $8000-$FFFF exposes solder pad setting | |||
|||| !=$08: CPU $8000-$FFFF exposes PRG-ROM | |||
||++- PRG/CHR A17..A18 | |||
|+--- Select PRG-ROM mode | |||
| 0: MMC3 mode | |||
| 1: NROM mode (see below) | |||
+---- PRG A14 mode when S=1 | |||
0: PRG A14=CPU A14 (NROM-256) | |||
1: PRG A14=MMC3 reg 6 bit 1 (NROM-128) | |||
* WRAM must be enabled in $A001.7 before writing to this register. | |||
* The inner PRG bank is restricted to 128 KiB. | |||
* NROM mode forces MMC3's CPU A13 and A14 inputs to GND and replaces MMC3's PRG A13 output with CPU A13. This means that MMC3 bank register 6 bits 1-3 provides PRG A14..A16 for the entire CPU $8000-$FFFF range. | |||
* The common dump of ''快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1'' has the 128 KiB PRG-ROM banks mixed-up, correct would be in the order 0, 3, 1, 2. The 128 KiB CHR-ROM banks were in the correct order all along, making the mapper seem more complicated than it actually is. | |||
==MMC3-compatible registers== | |||
Mask: $E001 | |||
See [[MMC3]]. | |||
Revision as of 10:59, 18 May 2021
NES 2.0 Mapper 344 denotes the GN-26 and NC7000M multicart circuit boards. Its UNIF board names are BMC-GN-26 (with incorrect PRG bank order) and BMC-BS-110 (which is the name of a different PCB whose name was mixed-up).
- 快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1, GN-26 PCB
- 14/400/8000/3000000-in-1, NC7000M PCB
Outer Bank and Mode Register ($6000-$7FFF, write)
Mask: $E000 A~FEDC BA98 7654 3210 ------------------- .... .... .... DSBb ++++- =$04: CHR A17=MMC3 A17 (256 KiB inner CHR) |||| !=$04: CHR A17=b (128 KiB inner CHR) |||| =$08: CPU $8000-$FFFF exposes solder pad setting |||| !=$08: CPU $8000-$FFFF exposes PRG-ROM ||++- PRG/CHR A17..A18 |+--- Select PRG-ROM mode | 0: MMC3 mode | 1: NROM mode (see below) +---- PRG A14 mode when S=1 0: PRG A14=CPU A14 (NROM-256) 1: PRG A14=MMC3 reg 6 bit 1 (NROM-128)
- WRAM must be enabled in $A001.7 before writing to this register.
- The inner PRG bank is restricted to 128 KiB.
- NROM mode forces MMC3's CPU A13 and A14 inputs to GND and replaces MMC3's PRG A13 output with CPU A13. This means that MMC3 bank register 6 bits 1-3 provides PRG A14..A16 for the entire CPU $8000-$FFFF range.
- The common dump of 快打金卡终极挑战 (Kuàidǎ Jīnkǎ Zhōngjí Tiǎozhàn) 3/6-in-1 has the 128 KiB PRG-ROM banks mixed-up, correct would be in the order 0, 3, 1, 2. The 128 KiB CHR-ROM banks were in the correct order all along, making the mapper seem more complicated than it actually is.
MMC3-compatible registers
Mask: $E001
See MMC3.