Action 53 mapper: Difference between revisions
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(→Configurations: Another possibility: BNROM oversize (for A53ception)) |
(→$80: Mode: In an earlier draft, I had the regs in more or less MMC1 order, before I discovered the difference between a supervisor reg and a user reg, but one table escaped renumbering.) |
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| Line 35: | Line 35: | ||
7654 3210 | 7654 3210 | ||
SS PPMM | SS PPMM | ||
|| ||++- | || ||++- Nametable mirroring mode | ||
|| ++--- PRG mode | || ++--- PRG bank mode | ||
++------ PRG outer bank size | ++------ PRG outer bank size | ||
</pre> | </pre> | ||
| Line 47: | Line 47: | ||
| 1 || 1-screen upper bank | | 1 || 1-screen upper bank | ||
|- | |- | ||
| 2 || Vertical (and ignore writes to bit 4 of registers | | 2 || Vertical (and ignore writes to bit 4 of registers $00 and $01) | ||
|- | |- | ||
| 3 || Horizontal (and ignore writes to bit 4 of registers | | 3 || Horizontal (and ignore writes to bit 4 of registers $00 and $01) | ||
|} | |} | ||
{| class="tabular" | {| class="tabular" | ||
Revision as of 11:44, 3 October 2012
This is a sketch of a mapper that allows making a multicart of games that use multiple discrete mappers. As a random sample, it'd support 1943: The Battle of Midway/Valhalla (UNROM), 3-D Battles of Worldrunner (UNROM), Battle City (NROM-128), Battle Kid: Fortress of Peril (UOROM), Battle Tank (CNROM), Battleship (CNROM), Battletoads (AOROM), and Gekitotsu Yonku Battle (UNROM).
Registers
- $5000-$5FFF
- Register select
- $8000-$FFFF
- Register value
$5000: Register select
7654 3210 S R | +- Select register +--------- 0: User registers; 1: Supervisor registers
In a multicart, registers $00 and $01 change the bank within a game, and registers $80 and $81 remain constant throughout a given game's execution.
$00: CHR bank
7654 3210 M BB | ++- Set CHR RAM A14-A13 +------ Set CIRAM A10 if H/V mirroring is disabled
$01: Inner bank
7654 3210 M BBBB | ++++- Set current PRG ROM bank +------ Set CIRAM A10 if H/V mirroring is disabled
$80: Mode
7654 3210 SS PPMM || ||++- Nametable mirroring mode || ++--- PRG bank mode ++------ PRG outer bank size
| Mode | Effect |
|---|---|
| 0 | 1-screen lower bank |
| 1 | 1-screen upper bank |
| 2 | Vertical (and ignore writes to bit 4 of registers $00 and $01) |
| 3 | Horizontal (and ignore writes to bit 4 of registers $00 and $01) |
| Mode | Effect |
|---|---|
| 0, 1 | Current 32 KiB bank in $8000-$FFFF |
| 2 | Bottom half of outer bank in $8000-$BFFF and current bank in $C000-$FFFF |
| 3 | Current bank in $8000-$BFFF and top half of outer bank in $8000-$BFFF |
| Mode | Effect |
|---|---|
| 0 | A20-A15 controlled by outer bank (32 KiB) |
| 1 | A20-A16 controlled by outer bank (64 KiB) |
| 2 | A20-A17 controlled by outer bank (128 KiB) |
| 3 | A20-A18 controlled by outer bank (256 KiB) |
$81: Outer bank
7654 3210 BB BBBB ++-++++- Set outer PRG ROM bank
Configurations
- NROM-128 (#0)
- Outer bank size 0, PRG mode 2 or 3, mirroring H or V, select $01
- NROM-256 (#0)
- Outer bank size 0, PRG mode 0, mirroring H or V, select $01
- CNROM (#3)
- Outer bank size 0, PRG mode 0, mirroring H or V, select $00
- BNROM (#34)
- Outer bank size 1-3, PRG mode 0, mirroring H or V, select $01
- BNROM oversize (#34 as emulated)
- Outer bank size 0, PRG mode 0, mirroring H or V, select $81, and modify bus-conflict-avoidance table for position within multicart
- UNROM (common) (#2)
- Outer bank size 1-3, PRG mode 3, mirroring H or V, select $01
- UNROM (Crazy Climber and MGC 2011) (#180)
- Outer bank size 1-3, PRG mode 2, mirroring H or V, select $01
- AOROM (#7)
- Outer bank size 1-3, PRG mode 0, mirroring 1-screen, select $01
Implementation notes
A CPLD requires at least one macrocell per bit of state, plus more macrocells for more complex operations. This mapper requires 20 bits of state, which leaves plenty of breathing room in a 36-cell CPLD for mapper logic.
- Register select: 2 bits
- Register $00: 6 bits (D4 is directed to register 0)
- Register $01: 4 bits (D4 is directed to register 0)
- Register $80: 6 bits
- Register $81: 2 bits (D4 is directed to register 0)
