MMC6 pinout: Difference between revisions

Revision as of 19:53, 28 June 2012

    48   33
    |    |
   .------.
49-|      |-32
   | MMC6 |
64-|      |-17
   \------'
    |    |
    01   16

Pin	Function	Pin	Function	Pin	Function	Pin	Function
01	CPU A13	17	CHR A10	33	R/W	49	CPU A4
02	M2	18	CHR A16	34	CPU D2	50	PRG A16
03	GND	19	CHR A11	35	CPU D3	51	CPU A5
04	GND	20	PPU A12	36	CPU D1	52	CPU A6
05	GND	21	CHR A13	37	GND	53	CPU A9
06	NC	22	CHR A12	38	+batt	54	CPU A7
07	GND	23	CHR A14	39	CPU D4	55	CPU A8
08	VCC	24	GND	40	CPU D0	56	+batt
09	VCC	25	+batt	41	CPU D5	57	GND
10	+batt	26	CHR /CE?	42	CPU A0	58	CPU A12
11	GND	27	VRAM A10	43	CPU D6	59	PRG A13
12	VCC	28	PPU /RD	44	CPU A1	60	PRG A15
13	threshold*	29	PPU A13	45	CPU D7	61	PRG A14
14	PPU A10	30	CHR A17	46	CPU A2	62	PRG A18
15	PPU A11	31	/IRQ	47	PRG /CE	63	CPU A14
16	NC	32	CPU /CE	48	CPU A3	64	PRG A17

Threshold: tied to a resistor divider between +5V and GND; resistor to +5V is 180 ohms, resistor to ground is 470 ohms.

@@ Line 32: / Line 32: @@
 | 09 || VCC || 25 || +batt || 41 || CPU D5 || 57 || GND
 |-
-| 10 || +batt || 26 || CHR A18 || 42 || CPU A0 || 58 || CPU A12
+| 10 || +batt || 26 || CHR /CE? || 42 || CPU A0 || 58 || CPU A12
 |-
 | 11 || GND || 27 || VRAM A10 || 43 || CPU D6 || 59 || PRG A13