INES Mapper 095: Difference between revisions
m (→Bank data ($8001-$9FFF, odd): N108 only had 2, not 8 ports like the MMC3, so increase the "bank data" range to cover the entire 32kiB) |
(rework lede. Go extra-verbose and include description of both registers since I was still kinda unhappy with the compromise version.) |
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[[Category:iNES Mappers|095]][[Category:MMC3-like mappers|095]][[Category:in NesCartDB|095]] | [[Category:iNES Mappers|095]][[Category:MMC3-like mappers|095]][[Category:in NesCartDB|095]] | ||
Mapper 95 represents '''NAMCOT-3425''', a board | Mapper 95 represents '''NAMCOT-3425''', a board used only for the game [http://bootgod.dyndns.org:7777/profile.php?id=1806 Dragon Buster (J)]. | ||
It is to the ordinary Namco 108 family boards ([[iNES Mapper 206|mapper 206]]) as TKSROM and TLSROM ([[iNES Mapper 118|mapper 118]]) is to ordinary [[MMC3]] boards. | |||
Instead of having hardwired mirroring like mapper 206, it has CHR A15 directly controlling CIRAM A10, just as CHR A17 controls CIRAM A10 on TxSROM. | Instead of having hardwired mirroring like mapper 206, it has CHR A15 directly controlling CIRAM A10, just as CHR A17 controls CIRAM A10 on TxSROM. | ||
Only horizontal mirroring and 1-screen mirroring are possible because the Namco 108 lacks the C bit of MMC3. | Only horizontal mirroring and 1-screen mirroring are possible because the Namco 108 lacks the C bit of MMC3. | ||
''Dragon Buster'' has only 32 KiB of CHR ROM, but homebrew using this mapper could use the full 64 KiB through careful arrangement of CHR ROM to put game background tiles in one half (which would always use one nametable) and status bar and menu tiles in the other half (which would always use the other nametable). | |||
Disch's older notes described an extended and mistaken version of this mapper with a full MMC3, so some emulators may be doing it that way. That extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7). | Disch's older notes described an extended and mistaken version of this mapper with a full MMC3, so some emulators may be doing it that way. That extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7). | ||
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chr_rom_addr = namco108_chrmap(ppu_addr&0x1FFF) & 0xFFFF; | chr_rom_addr = namco108_chrmap(ppu_addr&0x1FFF) & 0xFFFF; | ||
ciram_addr = ((namco108_chrmap(ppu_addr&0x1FFF)>>15)<<10) | (ppu_addr&0x03FF); | ciram_addr = ((namco108_chrmap(ppu_addr&0x1FFF)>>15)<<10) | (ppu_addr&0x03FF); | ||
=== Bank select ($8000-$9FFE, even) === | |||
7 bit 0 | |||
---- ---- | |||
xxxx xRRR | |||
||| | |||
+++- Specify which bank register to update on next write to Bank Data register | |||
0: Select 2 KB CHR bank at PPU $0000-$07FF and nametable at PPU $2000-$27FF | |||
1: Select 2 KB CHR bank at PPU $0800-$0FFF and nametable at PPU $2800-$2FFF | |||
2: Select 1 KB CHR bank at PPU $1000-$13FF | |||
3: Select 1 KB CHR bank at PPU $1400-$17FF | |||
4: Select 1 KB CHR bank at PPU $1800-$1BFF | |||
5: Select 1 KB CHR bank at PPU $1C00-$1FFF | |||
6: Select 8 KB PRG ROM bank at $8000-$9FFF | |||
7: Select 8 KB PRG ROM bank at $A000-$BFFF | |||
=== Bank data ($8001-$FFFF, odd) === | === Bank data ($8001-$FFFF, odd) === | ||
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0: Select Nametable A | 0: Select Nametable A | ||
1: Select Nametable B | 1: Select Nametable B | ||
Revision as of 21:11, 25 February 2017
Mapper 95 represents NAMCOT-3425, a board used only for the game Dragon Buster (J).
It is to the ordinary Namco 108 family boards (mapper 206) as TKSROM and TLSROM (mapper 118) is to ordinary MMC3 boards. Instead of having hardwired mirroring like mapper 206, it has CHR A15 directly controlling CIRAM A10, just as CHR A17 controls CIRAM A10 on TxSROM. Only horizontal mirroring and 1-screen mirroring are possible because the Namco 108 lacks the C bit of MMC3.
Dragon Buster has only 32 KiB of CHR ROM, but homebrew using this mapper could use the full 64 KiB through careful arrangement of CHR ROM to put game background tiles in one half (which would always use one nametable) and status bar and menu tiles in the other half (which would always use the other nametable).
Disch's older notes described an extended and mistaken version of this mapper with a full MMC3, so some emulators may be doing it that way. That extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7).
Here's a terse pseudocode:
chr_rom_addr = namco108_chrmap(ppu_addr&0x1FFF) & 0xFFFF; ciram_addr = ((namco108_chrmap(ppu_addr&0x1FFF)>>15)<<10) | (ppu_addr&0x03FF);
Bank select ($8000-$9FFE, even)
7 bit 0 ---- ---- xxxx xRRR ||| +++- Specify which bank register to update on next write to Bank Data register 0: Select 2 KB CHR bank at PPU $0000-$07FF and nametable at PPU $2000-$27FF 1: Select 2 KB CHR bank at PPU $0800-$0FFF and nametable at PPU $2800-$2FFF 2: Select 1 KB CHR bank at PPU $1000-$13FF 3: Select 1 KB CHR bank at PPU $1400-$17FF 4: Select 1 KB CHR bank at PPU $1800-$1BFF 5: Select 1 KB CHR bank at PPU $1C00-$1FFF 6: Select 8 KB PRG ROM bank at $8000-$9FFF 7: Select 8 KB PRG ROM bank at $A000-$BFFF
Bank data ($8001-$FFFF, odd)
7 bit 0 ---- ---- ..ND DDDD || |||| |+-++++- New bank value, based on last value written to Bank select register | All registers as standard Namco 108 | +------- Nametable select, based on last value written to Bank select register 0: Select Nametable A 1: Select Nametable B