INES Mapper 095: Difference between revisions

From NESdev Wiki
Jump to navigationJump to search
(m095 - thought the conclusion not to use dischs docs needed to be stronger, for clarification. why should we keep around the long docs? when we've pretty much tackled a board entirely, we should obsolete dischs docs)
m (agreed; cribbed the TxSROM description and removed disch's description. Contemplated fixing it instead of removing it but decided it was too redundant.)
Line 6: Line 6:
The mapper could be extended to 64 KiB through careful arrangement of CHR ROM to put game background tiles in one half (which would always use one nametable) and status bar and menu tiles in the other half (which would always use the other nametable).
The mapper could be extended to 64 KiB through careful arrangement of CHR ROM to put game background tiles in one half (which would always use one nametable) and status bar and menu tiles in the other half (which would always use the other nametable).


Disch's older notes (below) describe an extended (mistaken) version of this mapper with a full MMC3, so some emulators may be doing it that way. This extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7).
Disch's older notes described an extended and mistaken version of this mapper with a full MMC3, so some emulators may be doing it that way. That extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7).


  ========================
=== Bank data ($8001-$9FFF, odd) ===
  = Mapper 095          =
  7  bit  0
  ========================
---- ----
 
  ..MD DDDD
  aka
  || ||||
  --------------------------
  |+-++++- New bank value, based on last value written to Bank select register
  MMC3 (modified)
  |          0: Select 2 KB CHR bank at PPU $0000-$07FF
 
  |          1: Select 2 KB CHR bank at PPU $0800-$0FFF
 
  |          2, 3, 4, 5, 6, 7: as standard [[iNES Mapper 206|Namco 108]]
  Example Game:
  |
  --------------------------
  +--------- [[Mirroring]] configuration, based on the last value
  Dragon Buster (J)
              written to Bank select register
 
              0: Select Nametable at PPU $2000-$27FF (top left and right)
 
              1: Select Nametable at PPU $2800-$2FFF (bottom left and right)
  Notes:
  ---------------------------
  This mapper is a modified [[MMC3]].  It behaves exactly like your normal MMC3, only mirroring is handled
  differently.  For details on MMC3, refer to [[INES Mapper 004|mapper 004]].
 
 
  Regs:
  ---------------------------
 
  $8000:  [CP.. .AAA]
    C = CHR Mode
    P = PRG Mode
    A = Address for $8001
 
 
  This register operates exactly like it does on your normal MMC3.  It is mentioned here because the 'C' bit
  has another usage for mirroring.
 
 
 
  The normal mirroring reg ($A000) is totally ignored, and the CHR regs select nametables:
 
  When 'C' is set:
    [ R:2 ][ R:3 ]
    [ R:4 ][ R:5 ]
 
  When 'C' is clear:
    [ R:0 ][ R:0 ]
    [ R:1 ][ R:1 ]
 
 
  For mirroring, only bit 5 of the CHR regs is significant.  Bit 5 of the appropriate reg selects either NTA or
  NTB.

Revision as of 19:11, 15 June 2012

Mapper 95 represents NAMCOT-3425, a board that is to the ordinary Namco 108 family boards (mapper 206) as TKSROM and TLSROM (mapper 118) is to ordinary MMC3 boards (mapper 4). Instead of having hardwired mirroring like mapper 206, it has CHR A15 directly controlling CIRAM A10, just as CHR A17 controls CIRAM A10 on TxSROM. Only horizontal mirroring and 1-screen mirroring are possible because the Namco 108 lacks the C bit of MMC3. It is used for Dragon Buster (J), which has 32 KiB of CHR ROM. The mapper could be extended to 64 KiB through careful arrangement of CHR ROM to put game background tiles in one half (which would always use one nametable) and status bar and menu tiles in the other half (which would always use the other nametable).

Disch's older notes described an extended and mistaken version of this mapper with a full MMC3, so some emulators may be doing it that way. That extended version is identical to mapper 118, except CHR A15 (bank bit 5) controls CIRAM A10 instead of CHR A17 (bank bit 7).

Bank data ($8001-$9FFF, odd)

7  bit  0
---- ----
..MD DDDD
  || ||||
  |+-++++- New bank value, based on last value written to Bank select register
  |          0: Select 2 KB CHR bank at PPU $0000-$07FF
  |          1: Select 2 KB CHR bank at PPU $0800-$0FFF
  |          2, 3, 4, 5, 6, 7: as standard Namco 108
  |
  +--------- Mirroring configuration, based on the last value
             written to Bank select register
             0: Select Nametable at PPU $2000-$27FF (top left and right)
             1: Select Nametable at PPU $2800-$2FFF (bottom left and right)