INES Mapper 052: Difference between revisions

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m (refile, add cat:multicart)
(farid points out what we had here was wrong)
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[[Category:iNES Mappers|052]][[Category:MMC3-like mappers|052]][[Category:Multicart mappers|052]]
[[Category:iNES Mappers|052]][[Category:MMC3-like mappers|052]][[Category:Multicart mappers|052]]
  Here are Disch's original notes: 
 
  ========================
These notes were updated on 2013-11-19 in response to [http://forums.nesdev.org/viewtopic.php?f=9&t=10703 this thread] on the forum.
  =  Mapper 052          =
 
  ========================
[[iNES Mapper 052]], like several other multicart mappers, supplements the [[MMC3]]'s RAM with a single register for switching between unmodified MMC3-compatible games.
 
 
  Example Game:
  --------------------------
  Mario 7-in-1
 
 
  Notes:
  ---------------------------
 
  Yet another [[MMC3]] multicart.  For info on MMC3, see [[INES Mapper 004|mapper 004]].
 
 
   Registers:
   Registers:
   ---------------------------
   ---------------------------
    
    
     $6000-7FFF:  [.MHL SBPP]  Multicart reg
     $6000-7FFF:  [WMCC SBPP]  Multicart reg
        P = PRG Block (bits 0,1)
      P = PRG Block (bits 1,0)
        B = CHR+PRG Block Select bit (PRG bit 2, CHR bit 1)
          = PRG A18 and A17
        S = PRG Block size (0=512k   1=256k)
      B = CHR+PRG Block Select bit (PRG and CHR bit 2)
        L = CHR Block low bit (bit 0)
          = CHR and PRG A19
        H = CHR Block high bit (bit 2)
      S = PRG Block size (0=256k   1=128k)
        M = CHR Block size (0=256k  1=128k)
          = 0=PRG A17 comes from MMC3  1=A17 comes from this register
      C = CHR Block (bits 1,0)
          = CHR A18 and A17
      M = CHR Block size (0=256k  1=128k)
          = 0=CHR A17 comes from MMC3  1=A17 comes from this register
      W = 1=Disable multicart register and enable RAM
          0=allow further writes to multicart register
    
    
     $8000-FFFF:  Same as MMC3 for selected block
     $8000-FFFF:  Same as MMC3 for selected block
    
    
    
   This register can only be written to if PRG-RAM is enabled and writable (see $A001).
  $6000 can only be written to once ... and only if PRG-RAM is enabled and writable (see $A001). Once $6000
  has been written to, $6000-7FFF maps to PRG-RAM
 
 
    
    
   PRG Setup:
   PRG Setup:
Line 47: Line 38:
    
    
   PRG swapping behaves just like a normal MMC3 within this selected block
   PRG swapping behaves just like a normal MMC3 within this selected block
 
    
    
   CHR Setup:
   CHR Setup:
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     'M'    CHR-AND    CHR-OR
     'M'    CHR-AND    CHR-OR
     ------------------------
     ------------------------
       0      $FF    %HB 0000 0000
       0      $FF    %BC 0000 0000
       1      $7F    %HB L000 0000
       1      $7F    %BC C000 0000
    
    
   'H', 'B' and 'L' bits make a 3-bit value used as CHR-OR (left shift 7).  When 'M' is clear, the low bit of
   'B' and 'C' bits make a 3-bit value used as CHR-OR (left shift 7).  When 'M' is clear, the low bit of
   that value is forced to 0.
   that value is forced to 0.
    
    
   CHR swapping behaves just like a normal MMC3 within this selected block
   CHR swapping behaves just like a normal MMC3 within this selected block
 
    
    
   Powerup and Reset:
   Powerup and Reset:

Revision as of 20:55, 19 November 2013


These notes were updated on 2013-11-19 in response to this thread on the forum.

iNES Mapper 052, like several other multicart mappers, supplements the MMC3's RAM with a single register for switching between unmodified MMC3-compatible games. 

 Registers:
 ---------------------------
 
   $6000-7FFF:  [WMCC SBPP]  Multicart reg
     P = PRG Block (bits 1,0)
         = PRG A18 and A17
     B = CHR+PRG Block Select bit (PRG and CHR bit 2)
         = CHR and PRG A19
     S = PRG Block size (0=256k   1=128k)
         = 0=PRG A17 comes from MMC3  1=A17 comes from this register
     C = CHR Block (bits 1,0)
         = CHR A18 and A17
     M = CHR Block size (0=256k   1=128k)
         = 0=CHR A17 comes from MMC3  1=A17 comes from this register
     W = 1=Disable multicart register and enable RAM
         0=allow further writes to multicart register
 
   $8000-FFFF:  Same as MMC3 for selected block
 
 This register can only be written to if PRG-RAM is enabled and writable (see $A001).
 
 PRG Setup:
 ---------------------------
 
    'S'    PRG-AND    PRG-OR
    ------------------------
     0       $1F    %BP0 0000
     1       $0F    %BPP 0000
 
  'B' and 'P' bits make a 3-bit value used as PRG-OR (left shift 4).  When 'S' is clear, the low bit of that
 value is forced to 0.
 
 PRG swapping behaves just like a normal MMC3 within this selected block
 
 CHR Setup:
 ---------------------------
 
    'M'    CHR-AND    CHR-OR
    ------------------------
     0       $FF    %BC 0000 0000
     1       $7F    %BC C000 0000
 
  'B' and 'C' bits make a 3-bit value used as CHR-OR (left shift 7).  When 'M' is clear, the low bit of
 that value is forced to 0.
 
 CHR swapping behaves just like a normal MMC3 within this selected block
 
 Powerup and Reset:
 ---------------------------
 
 $6000 set to 0 on reset and powerup.
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