INES Mapper 031: Difference between revisions
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'''iNES Mapper 031''' represents ''2A03 Puritans'', a cartridge implementing a variant of the [[NSF]] mapper. | '''iNES Mapper 031''' represents ''2A03 Puritans'', a cartridge implementing a variant of the [[NSF]] mapper. | ||
PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on. | |||
As with [[BNROM]] and [[UxROM]], there is no mirroring, CHR bank, or IRQ control; this mapper is intended for use with an 8 | CHR-RAM is provided, but there is no CHR bankswitching. | ||
As with [[BNROM]] and [[UxROM]], there is no mirroring, CHR bank, or IRQ control; this mapper is intended for use with an 8 kB CHR-RAM and hardwired H or V mirroring. | |||
== Overview == | |||
* PRG ROM size: Up to 1024 KB | |||
* PRG ROM bank size: 4 kB | |||
* PRG RAM: None | |||
* CHR capacity: 8 KB RAM | |||
* CHR bank size: Not bankswitched | |||
* Nametable [[mirroring]]: horizontal or vertical, hard wired. | |||
* Subject to [[bus conflict]]s: No | |||
== Registers == | |||
=== PRG bank select $5000-$5FFF === | |||
address data | |||
15 bit 0 7 bit 0 | |||
------------------- --------- | |||
0101 .... .... .AAA PPPP PPPP | |||
||| |||| |||| | |||
||| ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address. | |||
+++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000) | |||
The canonical write position for these registers is $5FF8-$5FFF, as used in [[NSF]]s. | |||
At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset. | |||
== References == | == References == |
Revision as of 22:35, 24 January 2015
iNES Mapper 031 represents 2A03 Puritans, a cartridge implementing a variant of the NSF mapper.
PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.
CHR-RAM is provided, but there is no CHR bankswitching.
As with BNROM and UxROM, there is no mirroring, CHR bank, or IRQ control; this mapper is intended for use with an 8 kB CHR-RAM and hardwired H or V mirroring.
Overview
- PRG ROM size: Up to 1024 KB
- PRG ROM bank size: 4 kB
- PRG RAM: None
- CHR capacity: 8 KB RAM
- CHR bank size: Not bankswitched
- Nametable mirroring: horizontal or vertical, hard wired.
- Subject to bus conflicts: No
Registers
PRG bank select $5000-$5FFF
address data 15 bit 0 7 bit 0 ------------------- --------- 0101 .... .... .AAA PPPP PPPP ||| |||| |||| ||| ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address. +++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000)
The canonical write position for these registers is $5FF8-$5FFF, as used in NSFs.
At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset.
References
Emulator support
- BizHawk r6492
- MESS r30137
- puNES 0.84