INES Mapper 017: Difference between revisions

From NESdev Wiki
Jump to navigationJump to search
m (re-add cat:bad ines mappers but with caveat)
(Rewrite with info.)
Line 1: Line 1:
[[Category:INES Mappers|017]][[Category:Bad iNES Mappers|017]]
[[Category:INES Mappers|017]][[Category:Mappers with cycle IRQs]][[Category:Mappers with scanline IRQs]]
iNES Mapper 017 is used for ROM images that have been converted from disk images for the ''Front FarEast Super Magic Card'' copiers. All of these ROM images have been modified to use the copier's idiosyncratic bankswitch registers.


Mapper 17 is used for FFE disk images. See [[INES Mapper 006|Mapper 6]] for some additional details.
Unlike the ''[[INES Mapper 006|Bung Game Doctor]]'', the Super Magic Card has 256 KiB of CHR-RAM, allowing an entire game's CHR-ROM to fit. This drastically reduces the amount of modification necessary. Still, many of these images contain a 512-byte trainer that is loaded into PRG-RAM at $7000 if the game does not use battery-backed RAM, otherwise the trainer is loaded to $5D00 to not interfere with the save data.


FCEUX ostensibly emulates this.
=Banks=
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, switchable via register $4504
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, switchable via register $4505
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable via register $4506
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank, switchable via register $4507
* PPU $0000-$03FF: 1 KiB CHR-RAM bank, switchable via register $4510
* PPU $0400-$07FF: 1 KiB CHR-RAM bank, switchable via register $4511
* PPU $0800-$0BFF: 1 KiB CHR-RAM bank, switchable via register $4512
* PPU $0C00-$0FFF: 1 KiB CHR-RAM bank, switchable via register $4513
* PPU $1000-$13FF: 1 KiB CHR-RAM bank, switchable via register $4514
* PPU $1400-$17FF: 1 KiB CHR-RAM bank, switchable via register $4515
* PPU $1800-$1BFF: 1 KiB CHR-RAM bank, switchable via register $4516
* PPU $1C00-$1FFF: 1 KiB CHR-RAM bank, switchable via register $4517


Unfortunately, an early translation (of DBZ3) and some specific WAV-to-.NES converter actually use this mapper.
=Registers=
==Mirroring ($42FC-$42FF)==
A~FEDC BA98 7654 3210  D~7654 3210
  -------------------    ---------
  0100 0010 1111 11.M    ...M ....
                    +-------+------ Set nametable mirroring type
                                      0: One-screen, page 0
                                      1: One-screen, page 1
                                      2: Vertical
                                      3: Horizontal
 
==Copier Configuration Register ($4500)==
D~7654 3210
  ---------
  MMWW IPPP
  |||| |+++- PPU Mode. Set by the copier BIOS, games assume it to be 7.
  |||| +---- IRQ source select
  ||||        0: M2 rise
  ||||        1: PA12 rise (unfiltered, e.g. 8 rises per scanline)
  ||++------ SRAM mode at $6000-$7FFF. Set by the copier BIOS, games assume it to be 0.
  ++-------- Copier mode. Set by the copier BIOS, games assume it to be 1.
 
==IRQ Disable ($4501)==
Acknowledges and disables the IRQ counter.
 
==IRQ Counter Low Byte ($4502)==
This is the low byte of a '''15-bit''' (D0-D14) counter that, if nonzero, is increased on every M2/PA12 rise and raises an IRQ when the counter flips from $7FFF to $0000. Writing
to this register also acknowledges the IRQ.
 
==IRQ Counter High Byte ($4503)==
This is the high byte of a '''15-bit''' (D0-D14) counter that, if nonzero, is increased on every M2/PA12 rise and raises an IRQ when the counter flips from $7FFF to $0000. Writing
to this register also acknowledges and enables the IRQ.
 
==PRG-ROM Bank registers ($4504-$4507)==
* $4504: Set 8 KiB PRG-ROM bank at CPU $8000-$9FFF
* $4505: Set 8 KiB PRG-ROM bank at CPU $A000-$BFFF
* $4506: Set 8 KiB PRG-ROM bank at CPU $C000-$DFFF
* $4507: Set 8 KiB PRG-ROM bank at CPU $E000-$FFFF
 
==CHR-RAM Bank registers ($4510-$4517)==
* $4510: Set 1 KiB PRG-ROM bank at PPU $0000-$03FF
* $4511: Set 1 KiB PRG-ROM bank at PPU $0400-$07FF
* $4512: Set 1 KiB PRG-ROM bank at PPU $0800-$0BFF
* $4513: Set 1 KiB PRG-ROM bank at PPU $0C00-$0FFF
* $4514: Set 1 KiB PRG-ROM bank at PPU $1000-$13FF
* $4515: Set 1 KiB PRG-ROM bank at PPU $1400-$17FF
* $4516: Set 1 KiB PRG-ROM bank at PPU $1800-$1BFF
* $4517: Set 1 KiB PRG-ROM bank at PPU $1C00-$1FFF
 
=Notes=
* Before control is transferred to the game's Reset handler vectored at $FFFC, the copier BIOS issues a JSR to the Trainer's Init routine, if present. This call is necessary to properly set up initial CHR-RAM content and bankswitching registers. A few games also set up a table with IRQ counter values. Unlike [[INES Mapper 006]], the location of this Init routine varies between games. If a game has battery-backed RAM, this Init routine is always at $5D00; otherwise it can be at either $7000 or $7003, with the correct one detectable only via heuristics. $7003 seems to be correct unless the value at $7000 is $6C (indicating an indirect JMP), or both $7000 and $7003 contain the value $4C (JMP) ''and'' the jump offset at $7001 is lower than the jump offset at $7004.
* The FFE hack of ''Doki! Doki! Yuenchi'' has a graphical glitch during the introduction: the audience moves horizontally, caused by the IRQ handler writing an uninitialized Y register to $2005 that should be zero.

Revision as of 16:23, 13 May 2018

iNES Mapper 017 is used for ROM images that have been converted from disk images for the Front FarEast Super Magic Card copiers. All of these ROM images have been modified to use the copier's idiosyncratic bankswitch registers.

Unlike the Bung Game Doctor, the Super Magic Card has 256 KiB of CHR-RAM, allowing an entire game's CHR-ROM to fit. This drastically reduces the amount of modification necessary. Still, many of these images contain a 512-byte trainer that is loaded into PRG-RAM at $7000 if the game does not use battery-backed RAM, otherwise the trainer is loaded to $5D00 to not interfere with the save data.

Banks

  • CPU $8000-$9FFF: 8 KiB PRG-ROM bank, switchable via register $4504
  • CPU $A000-$BFFF: 8 KiB PRG-ROM bank, switchable via register $4505
  • CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable via register $4506
  • CPU $E000-$FFFF: 8 KiB PRG-ROM bank, switchable via register $4507
  • PPU $0000-$03FF: 1 KiB CHR-RAM bank, switchable via register $4510
  • PPU $0400-$07FF: 1 KiB CHR-RAM bank, switchable via register $4511
  • PPU $0800-$0BFF: 1 KiB CHR-RAM bank, switchable via register $4512
  • PPU $0C00-$0FFF: 1 KiB CHR-RAM bank, switchable via register $4513
  • PPU $1000-$13FF: 1 KiB CHR-RAM bank, switchable via register $4514
  • PPU $1400-$17FF: 1 KiB CHR-RAM bank, switchable via register $4515
  • PPU $1800-$1BFF: 1 KiB CHR-RAM bank, switchable via register $4516
  • PPU $1C00-$1FFF: 1 KiB CHR-RAM bank, switchable via register $4517

Registers

Mirroring ($42FC-$42FF)

A~FEDC BA98 7654 3210  D~7654 3210
  -------------------    ---------
  0100 0010 1111 11.M    ...M ....
                    +-------+------ Set nametable mirroring type
                                     0: One-screen, page 0
                                     1: One-screen, page 1
                                     2: Vertical
                                     3: Horizontal

Copier Configuration Register ($4500)

D~7654 3210
  ---------
  MMWW IPPP
  |||| |+++- PPU Mode. Set by the copier BIOS, games assume it to be 7.
  |||| +---- IRQ source select
  ||||        0: M2 rise
  ||||        1: PA12 rise (unfiltered, e.g. 8 rises per scanline)
  ||++------ SRAM mode at $6000-$7FFF. Set by the copier BIOS, games assume it to be 0.
  ++-------- Copier mode. Set by the copier BIOS, games assume it to be 1.

IRQ Disable ($4501)

Acknowledges and disables the IRQ counter.

IRQ Counter Low Byte ($4502)

This is the low byte of a 15-bit (D0-D14) counter that, if nonzero, is increased on every M2/PA12 rise and raises an IRQ when the counter flips from $7FFF to $0000. Writing to this register also acknowledges the IRQ.

IRQ Counter High Byte ($4503)

This is the high byte of a 15-bit (D0-D14) counter that, if nonzero, is increased on every M2/PA12 rise and raises an IRQ when the counter flips from $7FFF to $0000. Writing to this register also acknowledges and enables the IRQ.

PRG-ROM Bank registers ($4504-$4507)

  • $4504: Set 8 KiB PRG-ROM bank at CPU $8000-$9FFF
  • $4505: Set 8 KiB PRG-ROM bank at CPU $A000-$BFFF
  • $4506: Set 8 KiB PRG-ROM bank at CPU $C000-$DFFF
  • $4507: Set 8 KiB PRG-ROM bank at CPU $E000-$FFFF

CHR-RAM Bank registers ($4510-$4517)

  • $4510: Set 1 KiB PRG-ROM bank at PPU $0000-$03FF
  • $4511: Set 1 KiB PRG-ROM bank at PPU $0400-$07FF
  • $4512: Set 1 KiB PRG-ROM bank at PPU $0800-$0BFF
  • $4513: Set 1 KiB PRG-ROM bank at PPU $0C00-$0FFF
  • $4514: Set 1 KiB PRG-ROM bank at PPU $1000-$13FF
  • $4515: Set 1 KiB PRG-ROM bank at PPU $1400-$17FF
  • $4516: Set 1 KiB PRG-ROM bank at PPU $1800-$1BFF
  • $4517: Set 1 KiB PRG-ROM bank at PPU $1C00-$1FFF

Notes

  • Before control is transferred to the game's Reset handler vectored at $FFFC, the copier BIOS issues a JSR to the Trainer's Init routine, if present. This call is necessary to properly set up initial CHR-RAM content and bankswitching registers. A few games also set up a table with IRQ counter values. Unlike INES Mapper 006, the location of this Init routine varies between games. If a game has battery-backed RAM, this Init routine is always at $5D00; otherwise it can be at either $7000 or $7003, with the correct one detectable only via heuristics. $7003 seems to be correct unless the value at $7000 is $6C (indicating an indirect JMP), or both $7000 and $7003 contain the value $4C (JMP) and the jump offset at $7001 is lower than the jump offset at $7004.
  • The FFE hack of Doki! Doki! Yuenchi has a graphical glitch during the introduction: the audience moves horizontally, caused by the IRQ handler writing an uninitialized Y register to $2005 that should be zero.