Mask ROM pinout: Difference between revisions

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== Standard pinout PRG ROM - 16k / 32kB / 64kBytes (28pin) ==
== 8kB / 16kB / 32kB / 64kBytes (28pin) ROMs ==


This is the pinout Nintendo used for their PRGROMs, and it is compatible with EPROMs. For some unknown reasons, it was apparently required that unused adress lines on smaller ROMs were put to +5V, as Nintendo made different boards for each size (as opposed to place EPROMs of different sizes into the same slot). Some boards, such as CNROM, features solder pads in order to force those pins to +5V though.
Nintendo used by default JEDEC standard compatible pinouts for all their mask ROMs of 64 kBytes and below (but some particular boards might be exceptions !).
Names [in brackets] applies when the corresponding address pin is unused. On boards where an adress pin is never used (for example, A15 is never used on [[NROM]] boards as the ROM can't be greater than 32k), what is in brackets connects to the unused pin.


               ---U---
For some unknown reasons, unused address lines on smaller ROMs '''had to be''' put to +5V, as Nintendo made different boards for each size (as opposed to place EPROMs of different sizes into the same slot). Some boards, such as CNROM, features solder pads in order to force those pins to +5V though.
+5V or A15 - |01  28| - +5V
As Nintendo liked to use Mask ROMs from various manufacturers, apparently unused pins could be either not connected or additional active high CE enable lines. This would ensure that if Nintendo would order mask ROMs with additional enable lines that aren't used, they could place them on the board without having the fear of having them disabled accidentally.
         A12 - |02  27| - +5V or A14
 
         A7  - |03  26| - A13
This doesn't apply to CHR ROMs - i.e. a smaller ROM can always fit a slot made with a larger ROM in mind. Probably as the game will work if the ROM is "accidentally" disabled before the first write to CHR bankswitching registers.
         A6  - |04  25| - A8  
 
  27C64/128/256/512 EPROM pinout
               ---_---
  [+5V] A15 - |01  28| - +5V
         A12 - |02  27| - A14 [PGM]
         A7  - |03  26| - A13 [NC]
         A6  - |04  25| - A8
         A5  - |05  24| - A9
         A5  - |05  24| - A9
         A4  - |06  23| - A11
         A4  - |06  23| - A11
         A3  - |07  22| - /OE (/ROMSEL or mapper)
         A3  - |07  22| - /OE
         A2  - |08  21| - A10
         A2  - |08  21| - A10
         A1  - |09  20| - /CE (GND)
         A1  - |09  20| - /CE
         A0  - |10  19| - D7
         A0  - |10  19| - D7
         D0  - |11  18| - D6
         D0  - |11  18| - D6
Line 20: Line 28:
               -------
               -------


== Nintendo pinout PRG ROM - 128/256/512KBytes (28/32pin) ==
== 128/256/512 KBytes (28/32pin) ROMs ==


This is the pinout Nintendo used for most of their boards. It differs with standard EPROMs, and only have one enable line. This system allows for multiple sizes of ROMs on the same board.
Nintendo used the standard pinout for (extremely rare) prototype boards intended to take a 27C010/020/040 EPROM.
128 KB ROMs are only 28 pins, they are shuffled 2 pins down, starting from pin 3 to pin 30.
But retail Game Paks made by Nintendo have mask ROMs with a different pinout which is not compatible.
This pinout, with reshuffled enable lines and higher address lines, allows a 32-pin hole to take a 28-pin 128 KiB PRG ROM in pin 3 to pin 30.


On boards where A18 is never used, pin 2 is connected with pin 22.
For games using 256 KiB and larger ROMs, other companies producing Famicom or NES boards used either epoxy blobs or standard EPROM pinout. But games with 128 KiB of PRG were more often in a 28-pin package than not.


On Nintendo's boards where PRG A18 is never used, pin 2 is connected with pin 22.
Nintendo's MMC5 boards use the same pinout for both PRG and CHR ROMs, and even 128 KB PRG ROMs are 32-pin so they can have a VCC pin.
<pre style="display:inline-block">
        CHR ROM, PRG ROM, and 27C010/020/040/080 EPROM pinouts compared
MMC5    CHR        PRG      EPROM                  EPROM        PRG  CHR  MMC5
                                        ---_---
A17    A17 [+5V]  A17      [VPP] A19 - |01  32| - +5V
A18    /OE        A18 [/CE]      A16 - |02  31| - A18 [PGM]    +5V    /CE    /CE
                                  A15 - |03  30| - A17 [NC]    +5V    +5V    A19
                                  A12 - |04  29| - A14
                                  A7  - |05  28| - A13
                                  A6  - |06  27| - A8
                                  A5  - |07  26| - A9
                                  A4  - |08  25| - A11
                                  A3  - |09  24| - /OE          A16    A16    A16
                                  A2  - |10  23| - A10
                                  A1  - |11  22| - /CE                GND
                                  A0  - |12  21| - D7
                                  D0  - |13  20| - D6
                                  D1  - |14  19| - D5
                                  D2  - |15  18| - D4
                                  GND - |16  17| - D3
                                        -------
PRG and CHR pins are listed only if they differ from EPROM.
</pre>
== Variants ==
Here is a list of multiple variants of Nintendo's pinouts above. Only a couple of enable pins typically differs (which are shown in bold).
=== Nintendo RROM CHR ROM pinout - 8 KBytes (28pin) ===
This particular board is functionally identical to NROM but with a strange CHR pinout :
  [https://nescartdb.com/nescartdb.com/profile/view/2314 RROM] Non-standard 64-kbit CHR pinout
               ---_---
               ---_---
       A17 - |01  32| - +5V
       '''A7'''  - |01  28| - +5V
       A18 - |02  31| - +5V
       '''A6'''  - |02  27| - '''A8'''
       A15 - |03  30| - +5V
       '''A5'''  - |03  26| - '''A9'''
       A12 - |04  29| - A14
       '''A4'''  - |04  25| - '''A12'''
       A7 - |05  28| - A13
       '''A3''' - |05  24| - '''/CE'''
       A6  - |06  27| - A8
       '''+5V''' - |06  23| - '''NC'''
       A5  - |07  26| - A9
       '''+5V''' - |07  22| - /OE
       A4 - |08  25| - A11
       A2 - |08  21| - A10
      A3  - |09  24| - A16
       A1  - |09   20| - '''A11'''
      A2  - |10  23| - A10
       A0  - |10   19| - D7
       A1  - |11   22| - /CE (/ROMSEL or mapper)
       D0  - |11   18| - D6
       A0  - |12   21| - D7
       D1  - |12   17| - D5
       D0  - |13   20| - D6
       D2  - |13   16| - D4
       D1  - |14   19| - D5
       GND - |14   15| - D3
       D2  - |15   18| - D4
       GND - |16   17| - D3
               -------
               -------


== Nintendo AOROM PRG ROM pinout - 128/256/KBytes (32pin) ==
=== Nintendo SROM CHR ROM pinout - 8 KBytes (24pin) ===
 
This particular board is functionally identical to NROM but the CHR uses a 24-pin 8KB ROM with pinout very similar to the 27C32:
 
  SROM  23C62/64 JEDEC-Standard 64-kbit CHR pinout
            ---_---
      A7 - |01  24| - Vcc
      A6 - |02  23| - A8
      A5 - |03  22| - A9
      A4 - |04  21| - '''A12'''
      A3 - |05  20| - /OE
      A2 - |06  19| - A10
      A1 - |07  18| - '''A11'''
      A0 - |08  17| - D7
      D0 - |09  16| - D6
      D1 - |10  15| - D5
      D2 - |11  14| - D4
      Gnd - |12  13| - D3
            -------
 
With only one output enable, the board synthesizes the signal (/OE = PPU A13 + PPU /RD) using two transistors and a resistor.


Slight variant of the pinout above, where an additional enable line is used to prevent bus conflicts.
=== Nintendo STROM ===
This board uses three 23C62, 8 KBytes, 24 pin MASK ROMs (two as PRG-ROM and one as CHR-ROM) and a few discrete elements for an address decoder [https://forums.nesdev.org/viewtopic.php?f=9&t=3447&p=274110#p25434]


              ---_---
=== Nintendo AOROM PRG ROM pinout - 128/256/KBytes (32pin) ===
      A17 - |01  32| - +5V
(/ROMSEL) - |02  31| - CE (R/W)
      A15 - |03  30| - +5V
      A12 - |04  29| - A14
      A7  - |05  28| - A13
      A6  - |06  27| - A8
      A5  - |07  26| - A9
      A4  - |08  25| - A11
      A3  - |09  24| - A16
      A2  - |10  23| - A10
      A1  - |11  22| - /CE (/ROMSEL)
      A0  - |12  21| - D7
      D0  - |13  20| - D6
      D1  - |14  19| - D5
      D2  - |15  18| - D4
      GND - |16  17| - D3
              -------


== CHR ROM - 8/16/32/64 KBytes (28pin) ==
Very slight variant of the standard PRG-ROM pinout above, where an additional active high enable line is used to prevent bus conflicts.


This pinout is compatible with standard EPROMs, and is the same as for PRG ROM pinouts. However this time, unused address lines doesn't have to be put to +5V, and will be either NC (not connected) or +5V on boards where they are never used (where the mapper doesn't support larger ROMs)
              ---_---
        A17 - |01  32| - +5V
        /CE - |02  31| - '''CE (R/W)'''
        A15 - |03  30| - +5V
        A12 - |04  29| - A14
        A7  - |05  28| - A13
        A6  - |06  27| - A8
        A5  - |07  26| - A9
        A4  - |08  25| - A11
        A3  - |09  24| - A16
        A2  - |10  23| - A10
        A1  - |11  22| - /CE
        A0  - |12  21| - D7
        D0  - |13  20| - D6
        D1  - |14  19| - D5
        D2  - |15  18| - D4
      GND  - |16  17| - D3
              -------


                    ---_---
Japanese ''After Burner'' connects two such 128 kB mask roms in parallel (pin 2 = PPU /RD, pin 22 = SS4-CHR-/CE, pin31 = SS4-CHR-A17), which implies that one of them needs to have pin 31 active low and the other active high. [https://nescartdb.com/profile/view/3806/after-burner]
CHR A15 (or +5V) - |01  28| - +5V
          CHR A12 - |02  27| - CHR A14 (or +5V)
          CHR A7  - |03  26| - CHR A13 (or NC)
          CHR A6  - |04  25| - CHR A8
          CHR A5  - |05  24| - CHR A9
          CHR A4  - |06  23| - CHR A11
          CHR A3  - |07  22| - /OE  (CHR /RD)
          CHR A2  - |08  21| - CHR A10
          CHR A1  - |09  20| - /CE (CHR A13)
          CHR A0  - |10  19| - CHR D7
          CHR D0  - |11  18| - CHR D6
          CHR D1  - |12  17| - CHR D5
          CHR D2  - |13  16| - CHR D4
          GND    - |14  15| - CHR D3
                    -------


== CHR ROM - 128/256 KBytes (32pin) ==
== Signal descriptions ==
;A0-A12 : address
;D0-D7 : data
;/CE, /OE : The ROM will output data at address A on pins D only if all its CE (chip enable) and OE (output enable) pins are active (CE active high, /CE active low). /CE is sometimes called /CS (chip select). A memory responds faster to /OE than to /CE but draws less current while /CE is not asserted.
;PGM, VPP : Used only during EPROM programing / erasing process.


This is the pinout Nintendo used for most of their boards. It differs with standard EPROMs, and with the Nintendo's PRG ROMs pinout. This system allows for multiple sizes of ROMs on the same board. Adress lines which are always unused on a board are put to +5V.
See [[Cartridge connector#Signal Descriptions|Cartridge connector]] for other signals descriptions.


                  ---_---
== Converting a donor board ==
      CHR A17 - |01  32| - +5V
(CHR /RD) /OE - |02  31| - /CE (CHR A13)
      CHR A15 - |03  30| - +5V
      CHR A12 - |04  29| - CHR A14
      CHR A7  - |05  28| - CHR A13
      CHR A6  - |06  27| - CHR A8
      CHR A5  - |07  26| - CHR A9
      CHR A4  - |08  25| - CHR A11
      CHR A3  - |09  24| - CHR A16
      CHR A2  - |10  23| - CHR A10
      CHR A1  - |11  22| - GND
      CHR A0  - |12  21| - CHR D7
      CHR D0  - |13  20| - CHR D6
      CHR D1  - |14  19| - CHR D5
      CHR D2  - |15  18| - CHR D4
      GND    - |16  17| - CHR D3
                  -------


== Standard pinout - 128/256/512/1024 kBytes (32 pin) ==
To convert a cartridge board to accept EPROM:
# Compare the pinout of your EPROM to the mask ROM pinout expected by the board.
# Lift any pins whose signals differ.
# Solder short wires to the corresponding holes.
# Solder down the memory or socket with the pins that do not differ.
# Solder each lifted pin to the hole with the same signal.


This is the standard pinouts for larger EPROMs. The vast majority (if not all) non-Nintendo made boards use those. In order to use a random EPROM in a Nintendo made board, it's necessary to compare this pinout and the pinout your board uses, and to cut traces/add wires to compensate for the differences. The name in parenthesis is for when the adress is unused (for smaller EPROMs).
== See also ==
* [http://nesdev.org/NES%20EPROM%20Conversions.txt NES EPROM Conversions] by Drk. Instructions on how to modify certain boards to use EPROMs.
* [http://nesdev.org/NES%20ROM%20Pinouts.txt NES ROM pinouts] by Drk. Covers all PRG, CHR, and RAM chips used in NES cartridges.
* [http://nesdev.org/EPROM%20Pinouts.txt EPROM pinouts] by Drk.
* [http://callanbrown.com/index.php/advanced-mmc3-nes-reproduction Advanced MMC3 NES Reproduction Tutorial] by Callan Brown
* [http://forums.nesdev.org/viewtopic.php?p=171375#p171375 SNROM to SUROM] by Ice Man


                ---_---
[[Category:Pinouts]]
A19 (or VPP) - |01  32| - VCC
          A16 - |02  31| - A18 (or PGM)
          A15 - |03  30| - A17 (or NC)
          A12 - |04  29| - A14
          A7  - |05  28| - A13
          A6  - |06  27| - A8
          A5  - |07  26| - A9
          A4  - |08  25| - A11
          A3  - |09  24| - OE
          A2  - |10  23| - A10
          A1  - |11  22| - CE
          A0  - |12  21| - D7
          D0  - |13  20| - D6
          D1  - |14  19| - D5
          D2  - |15  18| - D4
          GND - |16  17| - D3
                -------

Latest revision as of 15:28, 26 July 2024

8kB / 16kB / 32kB / 64kBytes (28pin) ROMs

Nintendo used by default JEDEC standard compatible pinouts for all their mask ROMs of 64 kBytes and below (but some particular boards might be exceptions !). Names [in brackets] applies when the corresponding address pin is unused. On boards where an adress pin is never used (for example, A15 is never used on NROM boards as the ROM can't be greater than 32k), what is in brackets connects to the unused pin.

For some unknown reasons, unused address lines on smaller ROMs had to be put to +5V, as Nintendo made different boards for each size (as opposed to place EPROMs of different sizes into the same slot). Some boards, such as CNROM, features solder pads in order to force those pins to +5V though. As Nintendo liked to use Mask ROMs from various manufacturers, apparently unused pins could be either not connected or additional active high CE enable lines. This would ensure that if Nintendo would order mask ROMs with additional enable lines that aren't used, they could place them on the board without having the fear of having them disabled accidentally.

This doesn't apply to CHR ROMs - i.e. a smaller ROM can always fit a slot made with a larger ROM in mind. Probably as the game will work if the ROM is "accidentally" disabled before the first write to CHR bankswitching registers.

  27C64/128/256/512 EPROM pinout

              ---_---
 [+5V] A15 - |01   28| - +5V
       A12 - |02   27| - A14 [PGM]
       A7  - |03   26| - A13 [NC]
       A6  - |04   25| - A8
       A5  - |05   24| - A9
       A4  - |06   23| - A11
       A3  - |07   22| - /OE
       A2  - |08   21| - A10
       A1  - |09   20| - /CE
       A0  - |10   19| - D7
       D0  - |11   18| - D6
       D1  - |12   17| - D5
       D2  - |13   16| - D4
       GND - |14   15| - D3
              -------

128/256/512 KBytes (28/32pin) ROMs

Nintendo used the standard pinout for (extremely rare) prototype boards intended to take a 27C010/020/040 EPROM. But retail Game Paks made by Nintendo have mask ROMs with a different pinout which is not compatible. This pinout, with reshuffled enable lines and higher address lines, allows a 32-pin hole to take a 28-pin 128 KiB PRG ROM in pin 3 to pin 30.

For games using 256 KiB and larger ROMs, other companies producing Famicom or NES boards used either epoxy blobs or standard EPROM pinout. But games with 128 KiB of PRG were more often in a 28-pin package than not.

On Nintendo's boards where PRG A18 is never used, pin 2 is connected with pin 22.

Nintendo's MMC5 boards use the same pinout for both PRG and CHR ROMs, and even 128 KB PRG ROMs are 32-pin so they can have a VCC pin.

        CHR ROM, PRG ROM, and 27C010/020/040/080 EPROM pinouts compared
 
 MMC5    CHR        PRG      EPROM                   EPROM        PRG   CHR   MMC5
                                         ---_---
 A17    A17 [+5V]  A17      [VPP] A19 - |01   32| - +5V
 A18    /OE        A18 [/CE]      A16 - |02   31| - A18 [PGM]    +5V    /CE    /CE
                                  A15 - |03   30| - A17 [NC]     +5V    +5V    A19
                                  A12 - |04   29| - A14
                                  A7  - |05   28| - A13
                                  A6  - |06   27| - A8
                                  A5  - |07   26| - A9
                                  A4  - |08   25| - A11
                                  A3  - |09   24| - /OE          A16    A16    A16
                                  A2  - |10   23| - A10
                                  A1  - |11   22| - /CE                 GND
                                  A0  - |12   21| - D7
                                  D0  - |13   20| - D6
                                  D1  - |14   19| - D5
                                  D2  - |15   18| - D4
                                  GND - |16   17| - D3
                                         -------

PRG and CHR pins are listed only if they differ from EPROM.

Variants

Here is a list of multiple variants of Nintendo's pinouts above. Only a couple of enable pins typically differs (which are shown in bold).

Nintendo RROM CHR ROM pinout - 8 KBytes (28pin)

This particular board is functionally identical to NROM but with a strange CHR pinout :

  RROM Non-standard 64-kbit CHR pinout
             ---_---
      A7  - |01   28| - +5V
      A6  - |02   27| - A8
      A5  - |03   26| - A9
      A4  - |04   25| - A12
      A3  - |05   24| - /CE
      +5V - |06   23| - NC
      +5V - |07   22| - /OE
      A2  - |08   21| - A10
      A1  - |09   20| - A11
      A0  - |10   19| - D7
      D0  - |11   18| - D6
      D1  - |12   17| - D5
      D2  - |13   16| - D4
      GND - |14   15| - D3
             -------

Nintendo SROM CHR ROM pinout - 8 KBytes (24pin)

This particular board is functionally identical to NROM but the CHR uses a 24-pin 8KB ROM with pinout very similar to the 27C32:

  SROM  23C62/64 JEDEC-Standard 64-kbit CHR pinout
            ---_---
      A7 - |01   24| - Vcc
      A6 - |02   23| - A8
      A5 - |03   22| - A9
      A4 - |04   21| - A12
      A3 - |05   20| - /OE
      A2 - |06   19| - A10
      A1 - |07   18| - A11
      A0 - |08   17| - D7
      D0 - |09   16| - D6
      D1 - |10   15| - D5
      D2 - |11   14| - D4
     Gnd - |12   13| - D3
            -------

With only one output enable, the board synthesizes the signal (/OE = PPU A13 + PPU /RD) using two transistors and a resistor.

Nintendo STROM

This board uses three 23C62, 8 KBytes, 24 pin MASK ROMs (two as PRG-ROM and one as CHR-ROM) and a few discrete elements for an address decoder [1]

Nintendo AOROM PRG ROM pinout - 128/256/KBytes (32pin)

Very slight variant of the standard PRG-ROM pinout above, where an additional active high enable line is used to prevent bus conflicts.

              ---_---
       A17 - |01   32| - +5V
       /CE - |02   31| - CE (R/W)
       A15 - |03   30| - +5V
       A12 - |04   29| - A14
       A7  - |05   28| - A13
       A6  - |06   27| - A8 
       A5  - |07   26| - A9
       A4  - |08   25| - A11
       A3  - |09   24| - A16
       A2  - |10   23| - A10
       A1  - |11   22| - /CE
       A0  - |12   21| - D7
       D0  - |13   20| - D6
       D1  - |14   19| - D5
       D2  - |15   18| - D4
      GND  - |16   17| - D3
              -------

Japanese After Burner connects two such 128 kB mask roms in parallel (pin 2 = PPU /RD, pin 22 = SS4-CHR-/CE, pin31 = SS4-CHR-A17), which implies that one of them needs to have pin 31 active low and the other active high. [2]

Signal descriptions

A0-A12
address
D0-D7
data
/CE, /OE
The ROM will output data at address A on pins D only if all its CE (chip enable) and OE (output enable) pins are active (CE active high, /CE active low). /CE is sometimes called /CS (chip select). A memory responds faster to /OE than to /CE but draws less current while /CE is not asserted.
PGM, VPP
Used only during EPROM programing / erasing process.

See Cartridge connector for other signals descriptions.

Converting a donor board

To convert a cartridge board to accept EPROM:

  1. Compare the pinout of your EPROM to the mask ROM pinout expected by the board.
  2. Lift any pins whose signals differ.
  3. Solder short wires to the corresponding holes.
  4. Solder down the memory or socket with the pins that do not differ.
  5. Solder each lifted pin to the hole with the same signal.

See also