INES Mapper 148: Difference between revisions

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(for Mahjong World)
 
(someone bothered to trace the photos in the flickr link and found that CPU A13 and A14 are also ORed into the bits that must not be set for a mapper write)
 
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{{DEFAULTSORT:148}}[[Category:iNES Mappers]][[Category:GNROM-like mappers]]
{{DEFAULTSORT:148}}[[Category:iNES Mappers]][[Category:GNROM-like mappers]]
Nestopia and Санчез say that [[iNES Mapper 148]] is a cost-reduced version of mapper [[iNES Mapper 146|146]]=[[iNES Mapper 079|79]]=[[NINA-003-006|NINA-06]], omitting the bus conflict prevention circuitry.
'''iNES Mapper 148''' denotes the '''Sachen SA-008-A''' and '''Tengen 800008''' circuit boards, which switch up to 64 KiB of PRG-ROM in 32 KiB amounts and up to 64 KiB of CHR-ROM in 8 KiB amounts using a data latch. The bit assignment of the data latch is the same as [[INES Mapper 079]]'s, but unlike mapper 79, the latch register is in the CPU $8000-$FFFF range instead of $4100-$5FFF, introducing bus conflicts.  
 
The only game that exists in GoodNES and Nestopia's database that actually needs this definition is Sachen's Mahjong World; all the rest are accurately emulated using [[CNROM]]. Bizarrely, Nestopia's database decided it was more correct to put Panesian's oversize CNROM games here instead.


== Data Latch ==
   Mask: $8000
   Mask: $8000
   Bus conflicts:
   Bus conflicts:
   $8000: [.... PCCC]
   $8000: [.... PCCC] - Select 32 KiB PRG bank and 8 KiB CHR bank
 
Sachen's SA-008-A board uses a mask of $E000 but is otherwise the same.


== References ==
* http://cah4e3.shedevr.org.ru/%5Blst%5D-sachen-mappers.txt
* http://cah4e3.shedevr.org.ru/%5Blst%5D-sachen-mappers.txt
* [http://kevtris.org/mappers/tengen/800008.html Kev's analysis of Tengen 800008]
* [https://www.flickr.com/photos/153392699@N08/sets/72157680729618601 Box, cart, and PCB pictures]

Latest revision as of 16:44, 18 June 2024

iNES Mapper 148 denotes the Sachen SA-008-A and Tengen 800008 circuit boards, which switch up to 64 KiB of PRG-ROM in 32 KiB amounts and up to 64 KiB of CHR-ROM in 8 KiB amounts using a data latch. The bit assignment of the data latch is the same as INES Mapper 079's, but unlike mapper 79, the latch register is in the CPU $8000-$FFFF range instead of $4100-$5FFF, introducing bus conflicts.

Data Latch

 Mask: $8000
 Bus conflicts:
 $8000: [.... PCCC] - Select 32 KiB PRG bank and 8 KiB CHR bank

Sachen's SA-008-A board uses a mask of $E000 but is otherwise the same.

References