NES 2.0 submappers/Proposals: Difference between revisions

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If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.
If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.


== 005: [[MMC5]] ==


== [[iNES Mapper 021|021]], [[iNES Mapper 023|023]], [[iNES Mapper 025|025]]: [[VRC2]] / [[VRC4]] ==
Status: MMC5A is unimplemented in emulators, and all existing games are also valid as MMC5. Seems to be de-facto low priority.
 
'''these submappers are fully specified, allocation is pending the existence of test ROMs'''
 
'''additional review and consensus for the allocation numbering scheme is requested'''
 
These three mappers collect various configurations of [[VRC2]] and [[VRC4]] boards.
 
VRC2 is mostly a subset of VRC4, with differences including:
* VRC2 has a single bit of memory mapped at $6000-6FFF that the VRC4 does not<ref>http://forums.nesdev.org/viewtopic.php?t=8274 VRC2 memory bit at $6000-$6FFF</ref>, though it is redundant if WRAM is used.
* VRC4 has an interrupt device that VRC2 does not.
 
Additionally, different boards connect the address lines for the registers in various arrangements. The three iNES mappers 21, 23, and 25 each combine multiple boards whose addresses overlap. This is enough for game compatibility, but it creates an ugly combination that does not accurately describe the original hardware of either board.
 
=== Submapper assignment ===


Konami's [[VRC4]] mapper has five known variations (and one additional pirate variation) of how the board connects low CPU address lines among A7-A0 to the port select lines of the mapper.
=== 005: 0 ===
These are spread across three mappers: two for [[iNES Mapper 021|21]], two for [[iNES Mapper 025|25]], and one for [[iNES Mapper 023|23]].
MMC5
There are theoretically 8 * 7 = 56 ways to wire these, but in all five extant possibilities, two adjacent address lines are used: A2 and A1, A0 and A1, A7 and A6, A2 and A3, and A3 and A2.
All 14 ways to pick two subsequent integers easily fit in a submapper number:
<pre>
3210
||||
|+++- Which address line corresponds is wired to the A1 in the VRC4a
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line
</pre>
The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible. 15 is used to indicate VRC2 for the two mappers that it shares with VRC4.


The [[VRC4]] article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four [[VRC IRQ]] ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.
=== 005: 1 ===
{| class="tabular"
MMC5A
! Nickname || A2 || A1 || Registers || iNES mapper || NES 2.0 submapper
|-
| VRC4a || A2 || A1 || $x000, $x002, $x004, $x006 || 21 || 9
|-
| VRC4b || A0 || A1 || $x000, $x002, $x001, $x003 || 25 || 1
|-
| VRC4c || A7 || A6 || $x000, $x040, $x080, $x0C0 || 21 || 14
|-
| VRC4d || A2 || A3 || $x000, $x008, $x004, $x00C || 25 || 3
|-
| VRC4e || A3 || A2 || $x000, $x004, $x008, $x00C || 23 || 10
|-
| VRC4f || A1 || A0 || $x000, $x001, $x002, $x003 || 23 || 8
|}


There are three variations of the [[VRC2]] boards:
MMC5A is a known variant of the chip with some added features. However, all existing games with MMC5A also appear to have existed with MMC5. Nothing deliberately uses these features, but behaviour of a bug could differ by the selected chip.
{| class="tabular"
! Nickname || A2 || A1 || Registers || iNES mapper || NES 2.0 submapper
|-
| VRC2a* || A1 || A0 || $x000, $x002, $x001, $x003 || [[iNES Mapper 022|22]] || 0
|-
| VRC2b || A0 || A1 || $x000, $x001, $x002, $x003 || 23 || 15
|-
| VRC2c || A1 || A0 || $x000, $x002, $x001, $x003 || 25 || 15
|}


: * Note that VRC2a is exclusively assigned to [[iNES Mapper 022|mapper 22]], because it has an CHR bank select implementation that is incompatible with the others.
=== Bitfield Wishlist ===


=== Alternative Submapper Assignment ===
A previous proposal included this wishlist to use it as a bitfield for other mapper configurations that were never used in games. With the discovery of MMC5A variations, there can no longer enough bits to accommodate all of these.
 
Each of the 3 mappers represents only 2 addressing schemes. Any new addressing schemes are not backward compatible with iNES anyway so don't need their own submapper numbers. A newly discovered board would be a new mapper, not a submapper. There's no need to make space for future boards, the only potential variants for existing boards is VRC2 vs VRC4.
 
I would instead propose:
 
* 021: 1 VRC4a (A2, A1)
* 021: 2 VRC4c (A7, A6)
* 021: 3 unseen VRC2 (A2, A1)
* 021: 4 unseen VRC2 (A7, A6)
* 023: 1 VRC4f (A1, A0)
* 023: 2 VRC4e (A3, A2)
* 023: 3 VRC2b (A1, A0)
* 023: 4 unseen VRC2 (A3, A2)
* 025: 1 VRC4b (A0, A1)
* 025: 2 VRC4d (A2, A3)
* 025: 3 VRC2c (A0, A1)
* 025: 4 unseen VRC2 (A2, A3)
 
This covers all known variants, and any potential undiscovered VRC2 variants that could fit the existing iNES mappers.
 
=== 021 / 023 / 025: 0 ===
The default implementation acts as a VRC4 (mostly compatible superset of VRC2), and responds to register writes in one or more configurations simultaneously (supporting both boards at once).
 
=== 021 / 023 / 025: 1, 3, 8, 9, 10, 14 VRC4 ===
These allocations each request a single specific addressing scheme for VRC4, rather than the combined version used by submapper 0.
 
Test ROMs:
* 021: 9 VRC4a - '''please create a test ROM before allocating this submapper'''
* 025: 1 VRC4b - '''please create a test ROM before allocating this submapper'''
* 021: 14 VRC4c - '''please create a test ROM before allocating this submapper'''
* 025: 3 VRC4d - '''please create a test ROM before allocating this submapper'''
* 023: 10 VRC4e - '''please create a test ROM before allocating this submapper'''
* 023: 8 VRC4f - '''please create a test ROM before allocating this submapper'''
 
=== 023: 8 VRC4f ===
Some second-source VRC4 clones used a memory layout that was identical to the VRC2b (the simplest contiguous in-order interpretation: 0,1,2,3). This was used in ''World Hero''.
 
Test ROM:
* '''please create a test ROM before allocating this submapper'''
 
=== 023: 15 VRC2b ===
Some games rely on a single bit of memory mapped in the region from $6000-$6FFF on VRC2. These games were previously supported with submapper 0 by implementing WRAM in this region (despite these games not having WRAM). Additionally, VRC2 does not implement VRC4's interrupts. This board was used in ''[http://bootgod.dyndns.org:7777/profile.php?id=3986 Contra (J)]'' and ''[http://bootgod.dyndns.org:7777/profile.php?id=1568 Ganbare Goemon 2]''.
 
Test ROM:
* '''please create a test ROM before allocating this submapper'''
 
=== 025: 15 VRC2c ===
''[http://bootgod.dyndns.org:7777/profile.php?id=3823 Ganbare Goemon Gaiden: Keita Ougon Kiseru]'' uses VRC2c. It is compatible with submapper 0, but VRC4 has an additional interrupt capability (unused by this game).
 
Test ROM:
* '''please create a test ROM before allocating this submapper'''
 
== 005: [[MMC5]] ==
Status: Wishlist


Vertical split mode: <br>
Vertical split mode: <br>
Line 135: Line 36:
If both kinds of PRG-RAM present: <br>
If both kinds of PRG-RAM present: <br>
0: Chip 0 is battery-backed (ETROM (note: verify this)) <br>
0: Chip 0 is battery-backed (ETROM (note: verify this)) <br>
2: Chip 1 is battery-backed <br>
4: Chip 1 is battery-backed <br>


Pulse waves volume: <br>
Pulse waves volume: <br>
0: R1 is 6.8kΩ (as in all games that use expansion audio) <br>
0: R1 is 6.8kΩ (as in all games that use expansion audio) <br>
4: R1 is 15kΩ (the nominal value of this resistor) <br>
8: R1 is 15kΩ (the nominal value of this resistor) <br>
 
It is safe to leave the submapper number at 0 for all known games.
 
== 016: [[Bandai FCG board]]s ==
KH assigned the following redundant submappers. All are deprecated in favor of using the actual mapper numbers and/or NVRAM size field.
 
0: [[iNES Mapper 153]] (SRAM)<br/>
1: [[iNES Mapper 157]] (Datach)<br/>
2: [[iNES Mapper 159]] (128B EEPROM)<br/>
3: "Normal" [[iNES Mapper 016]] behavior. (256B or no EEPROM)


== 019: Namco 129 and 163 ==
== 070: Bandai UNROM/GNROM hybrid ==
Status: Problem outline
Status: Problem outline, needs followup?


[[iNES Mapper 019|Mapper 19]] designates the [[Namco 163|Namco 129 and 163]], which supports [[Namco 163 audio|expansion sound]], IRQs, and ROM nametables.
There is [https://forums.nesdev.org/viewtopic.php?t=16916 a report] of a pirate copy of a game that seems to want mapper 70 without bus conflicts, even though Bandai's original hardware should have them.


Different 163-using PCBs used a different resistor to change the volume of the expansion audio relative to the internal 2A03 audio. It is unclear if this variation warrants a submapper.
Tentatively, we could use the same submappers as those standardized for mappers 2, 3, & 7.
 
KH allocated a submapper specifically for the N163-using game Mindseeker. It is not known what is different about this game.
 
Tentative suggestion:<br/>
Mapper 19:<br/>
1: KH assigned to Mindseeker. Specifics unknown. Deprecated until such time as sufficient documentation is made.<br/>
2: N163, expansion audio unused (mixing resistor: 0Ω)<br/>
3: N163, mixing resistor:  4.7kΩ<br/>
4: N163, mixing resistor: 10kΩ<br/>
5: N163, mixing resistor: 15kΩ<br/>
9: N129. Expansion audio is known buggy relative to N163, but other differences are not known.<br/>
 
Source: [http://blog.kevtris.org/blogfiles/nes/submappers.txt KH's submappers]


== [[iNES Mapper 083|083]]: Cony ==
== [[iNES Mapper 083|083]]: Cony ==
There's actually three different versions of the hardware, all assigned to the same mapper.
Status: Needs documentation of affected games and implementation testing.


Unfortunately, we have no idea which is which.
"There's actually three different versions of the hardware, all assigned to the same mapper. Unfortunately, we have no idea which is which."


Here's Kevtris's assignments:
Kevtris's assignments:
=== 083: 0 ===
=== 083: 0 ===
"Bog-standard Cony mapper.  1K CHR ROM banks, no WRAM."
"Bog-standard Cony mapper.  1K CHR ROM banks, no WRAM."
Line 195: Line 73:
# WRAM at 6000-7FFFh.  WRAM is banked with the PRG/CHR superbank.  This gives a total of 32K.  It is battery backed.
# WRAM at 6000-7FFFh.  WRAM is banked with the PRG/CHR superbank.  This gives a total of 32K.  It is battery backed.


== [[iNES Mapper 185]] ==
== [[iNES Mapper 086|086]]: Jaleco JF-13 ==
Status: Draft
Status: Needs documentation of behaviour differences and chip emulation, a way to dump sample data for emulatable ROMs, and relevant games.
 
A few NROM-like games were released on CNROM boards where all four bits of the latch were solely used as an anti-piracy measure. While a documented heuristic exists for which values were used, we tentatively suggest that the submapper here indicate the value to be written to the latch for normal operation (<tt>submapper = (latch&0x30)/4+(latch&3)</tt>)


<pre>
There is a bootleg variant that uses a UM5100 (DPCM) instead of µPD7756C (ADPCM).
3210 
||||
|||+- Bit 0 (bank number)
||+-- Bit 1 (bank number)
|+--- Bit 4 (diode config)
+---- Bit 5 (diode config)
</pre>


In the case that any of the bits are "don't care", use 0.
=== 086: 0 ===
Uses µPD7756C (Standard).


----
=== 086: 1 ===
On second thought, lidnariq would be happier with
Uses UM5100 (Bootleg).
<pre>
3210
xxCC
||||
|||+- Bit 0 (bank number)
||+-- Bit 1 (bank number)
++--- Always "01", so that submapper 0 (use heuristic) doesn't collide with "write 0 for correct operation"
</pre>


== References ==
== References ==
<references />
<references />
* [http://atariage.com/forums/topic/242970-fpga-based-videogame-system/?p=3687219 Atari Age forum post] - Kevtris' Analogue NT Mini firmware notes including a slightly updated submapper list.
* [http://atariage.com/forums/topic/242970-fpga-based-videogame-system/?p=3687219 Atari Age forum post] - Kevtris' Analogue NT Mini firmware notes including a slightly updated submapper list.

Latest revision as of 19:09, 18 January 2023

This page collects proposals for NES 2.0 submappers that are not yet ready for implementation.

  1. Explain what game or ROM is incompatible with existing submappers.
  2. Explain how the proposed submapper should be implemented.
  3. Allow one or more other members of the community to independently verify that both 1 and 2 are correct. (We'll perform peer review, commentary, and possible revision/iteration here.)
  4. Allocate and document the new submapper, listing the relevant game/ROM.

When allocating new submappers, please consult kevtris' original proposal before choosing a number. If it is something he already assigned that we have just not adopted yet, use his existing assignment: submappers.txt

If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.

005: MMC5

Status: MMC5A is unimplemented in emulators, and all existing games are also valid as MMC5. Seems to be de-facto low priority.

005: 0

MMC5

005: 1

MMC5A

MMC5A is a known variant of the chip with some added features. However, all existing games with MMC5A also appear to have existed with MMC5. Nothing deliberately uses these features, but behaviour of a bug could differ by the selected chip.

Bitfield Wishlist

A previous proposal included this wishlist to use it as a bitfield for other mapper configurations that were never used in games. With the discovery of MMC5A variations, there can no longer enough bits to accommodate all of these.

Vertical split mode:
0: SL (all known hardware)
1: CL

If only one kind (battery or non-battery) of PRG-RAM present:
0: PRG-RAM is contiguous (EKROM, EWROM)
2: PRG-RAM is not contiguous; is split in half across two chips

If both kinds of PRG-RAM present:
0: Chip 0 is battery-backed (ETROM (note: verify this))
4: Chip 1 is battery-backed

Pulse waves volume:
0: R1 is 6.8kΩ (as in all games that use expansion audio)
8: R1 is 15kΩ (the nominal value of this resistor)

070: Bandai UNROM/GNROM hybrid

Status: Problem outline, needs followup?

There is a report of a pirate copy of a game that seems to want mapper 70 without bus conflicts, even though Bandai's original hardware should have them.

Tentatively, we could use the same submappers as those standardized for mappers 2, 3, & 7.

083: Cony

Status: Needs documentation of affected games and implementation testing.

"There's actually three different versions of the hardware, all assigned to the same mapper. Unfortunately, we have no idea which is which."

Kevtris's assignments:

083: 0

"Bog-standard Cony mapper. 1K CHR ROM banks, no WRAM."

083: 1

"Same, but with 2K CHR ROM banks instead."

083: 2

"This is the standard Cony mapper with the following changes:

  1. 1K CHR ROM banks (like 83.0)
  1. a 4 bit 256K CHR/PRG bank select register:
    • B000h: bits 6 and 7 select the 256K superbank
  1. 1 byte of RAM at 5103h (stores the last game played) Game will not start without this RAM byte.
  1. WRAM at 6000-7FFFh. WRAM is banked with the PRG/CHR superbank. This gives a total of 32K. It is battery backed.

086: Jaleco JF-13

Status: Needs documentation of behaviour differences and chip emulation, a way to dump sample data for emulatable ROMs, and relevant games.

There is a bootleg variant that uses a UM5100 (DPCM) instead of µPD7756C (ADPCM).

086: 0

Uses µPD7756C (Standard).

086: 1

Uses UM5100 (Bootleg).

References

  • Atari Age forum post - Kevtris' Analogue NT Mini firmware notes including a slightly updated submapper list.
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